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bibo-maochenhuacai
bibo-mao
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chenhuacai
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LoongArch: KVM: Set default return value in KVM IO bus ops
When in-kernel irqchip is enabled, its register area is registered in the KVM IO bus list with API kvm_io_bus_register_dev(). In MMIO/IOCSR register access emulation, kvm_io_bus_read()/kvm_io_bus_write() is called firstly. If it returns 0, it means that the in-kernel irqchip handles the emulation already, else it returns to user-mode VMM and lets VMM emulate the register access. Once in-kernel irqchip is enabled, it should return 0 if the address is within range of the registered KVM IO bus. It should not return to user-mode VMM since VMM does not know how to handle it, and irqchip is handled in kernel already. Here set default return value with 0 in KVM IO bus operations. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
1 parent 382c38c commit 2faec60

3 files changed

Lines changed: 39 additions & 61 deletions

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‎arch/loongarch/kvm/intc/eiointc.c‎

Lines changed: 17 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -119,7 +119,7 @@ void eiointc_set_irq(struct loongarch_eiointc *s, int irq, int level)
119119
static int loongarch_eiointc_read(struct kvm_vcpu *vcpu, struct loongarch_eiointc *s,
120120
gpa_t addr, unsigned long *val)
121121
{
122-
int index, ret = 0;
122+
int index;
123123
u64 data = 0;
124124
gpa_t offset;
125125

@@ -150,40 +150,36 @@ static int loongarch_eiointc_read(struct kvm_vcpu *vcpu, struct loongarch_eioint
150150
data = s->coremap[index];
151151
break;
152152
default:
153-
ret = -EINVAL;
154153
break;
155154
}
156155
*val = data;
157156

158-
return ret;
157+
return 0;
159158
}
160159

161160
static int kvm_eiointc_read(struct kvm_vcpu *vcpu,
162161
struct kvm_io_device *dev,
163162
gpa_t addr, int len, void *val)
164163
{
165-
int ret = -EINVAL;
166164
unsigned long flags, data, offset;
167165
struct loongarch_eiointc *eiointc = vcpu->kvm->arch.eiointc;
168166

169167
if (!eiointc) {
170168
kvm_err("%s: eiointc irqchip not valid!\n", __func__);
171-
return -EINVAL;
169+
return 0;
172170
}
173171

174172
if (addr & (len - 1)) {
175173
kvm_err("%s: eiointc not aligned addr %llx len %d\n", __func__, addr, len);
176-
return -EINVAL;
174+
return 0;
177175
}
178176

179177
offset = addr & 0x7;
180178
addr -= offset;
181179
vcpu->stat.eiointc_read_exits++;
182180
spin_lock_irqsave(&eiointc->lock, flags);
183-
ret = loongarch_eiointc_read(vcpu, eiointc, addr, &data);
181+
loongarch_eiointc_read(vcpu, eiointc, addr, &data);
184182
spin_unlock_irqrestore(&eiointc->lock, flags);
185-
if (ret)
186-
return ret;
187183

188184
data = data >> (offset * 8);
189185
switch (len) {
@@ -208,7 +204,7 @@ static int loongarch_eiointc_write(struct kvm_vcpu *vcpu,
208204
struct loongarch_eiointc *s,
209205
gpa_t addr, u64 value, u64 field_mask)
210206
{
211-
int index, irq, ret = 0;
207+
int index, irq;
212208
u8 cpu;
213209
u64 data, old, mask;
214210
gpa_t offset;
@@ -287,54 +283,52 @@ static int loongarch_eiointc_write(struct kvm_vcpu *vcpu,
287283
eiointc_update_sw_coremap(s, index * 8, data, sizeof(data), true);
288284
break;
289285
default:
290-
ret = -EINVAL;
291286
break;
292287
}
293288

294-
return ret;
289+
return 0;
295290
}
296291

297292
static int kvm_eiointc_write(struct kvm_vcpu *vcpu,
298293
struct kvm_io_device *dev,
299294
gpa_t addr, int len, const void *val)
300295
{
301-
int ret = -EINVAL;
302296
unsigned long flags, value;
303297
struct loongarch_eiointc *eiointc = vcpu->kvm->arch.eiointc;
304298

305299
if (!eiointc) {
306300
kvm_err("%s: eiointc irqchip not valid!\n", __func__);
307-
return -EINVAL;
301+
return 0;
308302
}
309303

310304
if (addr & (len - 1)) {
311305
kvm_err("%s: eiointc not aligned addr %llx len %d\n", __func__, addr, len);
312-
return -EINVAL;
306+
return 0;
313307
}
314308

315309
vcpu->stat.eiointc_write_exits++;
316310
spin_lock_irqsave(&eiointc->lock, flags);
317311
switch (len) {
318312
case 1:
319313
value = *(unsigned char *)val;
320-
ret = loongarch_eiointc_write(vcpu, eiointc, addr, value, 0xFF);
314+
loongarch_eiointc_write(vcpu, eiointc, addr, value, 0xFF);
321315
break;
322316
case 2:
323317
value = *(unsigned short *)val;
324-
ret = loongarch_eiointc_write(vcpu, eiointc, addr, value, USHRT_MAX);
318+
loongarch_eiointc_write(vcpu, eiointc, addr, value, USHRT_MAX);
325319
break;
326320
case 4:
327321
value = *(unsigned int *)val;
328-
ret = loongarch_eiointc_write(vcpu, eiointc, addr, value, UINT_MAX);
322+
loongarch_eiointc_write(vcpu, eiointc, addr, value, UINT_MAX);
329323
break;
330324
default:
331325
value = *(unsigned long *)val;
332-
ret = loongarch_eiointc_write(vcpu, eiointc, addr, value, ULONG_MAX);
326+
loongarch_eiointc_write(vcpu, eiointc, addr, value, ULONG_MAX);
333327
break;
334328
}
335329
spin_unlock_irqrestore(&eiointc->lock, flags);
336330

337-
return ret;
331+
return 0;
338332
}
339333

340334
static const struct kvm_io_device_ops kvm_eiointc_ops = {
@@ -352,7 +346,7 @@ static int kvm_eiointc_virt_read(struct kvm_vcpu *vcpu,
352346

353347
if (!eiointc) {
354348
kvm_err("%s: eiointc irqchip not valid!\n", __func__);
355-
return -EINVAL;
349+
return 0;
356350
}
357351

358352
addr -= EIOINTC_VIRT_BASE;
@@ -376,28 +370,25 @@ static int kvm_eiointc_virt_write(struct kvm_vcpu *vcpu,
376370
struct kvm_io_device *dev,
377371
gpa_t addr, int len, const void *val)
378372
{
379-
int ret = 0;
380373
unsigned long flags;
381374
u32 value = *(u32 *)val;
382375
struct loongarch_eiointc *eiointc = vcpu->kvm->arch.eiointc;
383376

384377
if (!eiointc) {
385378
kvm_err("%s: eiointc irqchip not valid!\n", __func__);
386-
return -EINVAL;
379+
return 0;
387380
}
388381

389382
addr -= EIOINTC_VIRT_BASE;
390383
spin_lock_irqsave(&eiointc->lock, flags);
391384
switch (addr) {
392385
case EIOINTC_VIRT_FEATURES:
393-
ret = -EPERM;
394386
break;
395387
case EIOINTC_VIRT_CONFIG:
396388
/*
397389
* eiointc features can only be set at disabled status
398390
*/
399391
if ((eiointc->status & BIT(EIOINTC_ENABLE)) && value) {
400-
ret = -EPERM;
401392
break;
402393
}
403394
eiointc->status = value & eiointc->features;
@@ -407,7 +398,7 @@ static int kvm_eiointc_virt_write(struct kvm_vcpu *vcpu,
407398
}
408399
spin_unlock_irqrestore(&eiointc->lock, flags);
409400

410-
return ret;
401+
return 0;
411402
}
412403

413404
static const struct kvm_io_device_ops kvm_eiointc_virt_ops = {

‎arch/loongarch/kvm/intc/ipi.c‎

Lines changed: 8 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -111,7 +111,7 @@ static int mail_send(struct kvm *kvm, uint64_t data)
111111
vcpu = kvm_get_vcpu_by_cpuid(kvm, cpu);
112112
if (unlikely(vcpu == NULL)) {
113113
kvm_err("%s: invalid target cpu: %d\n", __func__, cpu);
114-
return -EINVAL;
114+
return 0;
115115
}
116116
mailbox = ((data & 0xffffffff) >> 2) & 0x7;
117117
offset = IOCSR_IPI_BUF_20 + mailbox * 4;
@@ -145,7 +145,7 @@ static int send_ipi_data(struct kvm_vcpu *vcpu, gpa_t addr, uint64_t data)
145145
srcu_read_unlock(&vcpu->kvm->srcu, idx);
146146
if (unlikely(ret)) {
147147
kvm_err("%s: : read data from addr %llx failed\n", __func__, addr);
148-
return ret;
148+
return 0;
149149
}
150150
/* Construct the mask by scanning the bit 27-30 */
151151
for (i = 0; i < 4; i++) {
@@ -162,7 +162,7 @@ static int send_ipi_data(struct kvm_vcpu *vcpu, gpa_t addr, uint64_t data)
162162
if (unlikely(ret))
163163
kvm_err("%s: : write data to addr %llx failed\n", __func__, addr);
164164

165-
return ret;
165+
return 0;
166166
}
167167

168168
static int any_send(struct kvm *kvm, uint64_t data)
@@ -174,7 +174,7 @@ static int any_send(struct kvm *kvm, uint64_t data)
174174
vcpu = kvm_get_vcpu_by_cpuid(kvm, cpu);
175175
if (unlikely(vcpu == NULL)) {
176176
kvm_err("%s: invalid target cpu: %d\n", __func__, cpu);
177-
return -EINVAL;
177+
return 0;
178178
}
179179
offset = data & 0xffff;
180180

@@ -183,7 +183,6 @@ static int any_send(struct kvm *kvm, uint64_t data)
183183

184184
static int loongarch_ipi_readl(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *val)
185185
{
186-
int ret = 0;
187186
uint32_t offset;
188187
uint64_t res = 0;
189188

@@ -202,33 +201,27 @@ static int loongarch_ipi_readl(struct kvm_vcpu *vcpu, gpa_t addr, int len, void
202201
spin_unlock(&vcpu->arch.ipi_state.lock);
203202
break;
204203
case IOCSR_IPI_SET:
205-
res = 0;
206-
break;
207204
case IOCSR_IPI_CLEAR:
208-
res = 0;
209205
break;
210206
case IOCSR_IPI_BUF_20 ... IOCSR_IPI_BUF_38 + 7:
211207
if (offset + len > IOCSR_IPI_BUF_38 + 8) {
212208
kvm_err("%s: invalid offset or len: offset = %d, len = %d\n",
213209
__func__, offset, len);
214-
ret = -EINVAL;
215210
break;
216211
}
217212
res = read_mailbox(vcpu, offset, len);
218213
break;
219214
default:
220215
kvm_err("%s: unknown addr: %llx\n", __func__, addr);
221-
ret = -EINVAL;
222216
break;
223217
}
224218
*(uint64_t *)val = res;
225219

226-
return ret;
220+
return 0;
227221
}
228222

229223
static int loongarch_ipi_writel(struct kvm_vcpu *vcpu, gpa_t addr, int len, const void *val)
230224
{
231-
int ret = 0;
232225
uint64_t data;
233226
uint32_t offset;
234227

@@ -239,7 +232,6 @@ static int loongarch_ipi_writel(struct kvm_vcpu *vcpu, gpa_t addr, int len, cons
239232

240233
switch (offset) {
241234
case IOCSR_IPI_STATUS:
242-
ret = -EINVAL;
243235
break;
244236
case IOCSR_IPI_EN:
245237
spin_lock(&vcpu->arch.ipi_state.lock);
@@ -257,7 +249,6 @@ static int loongarch_ipi_writel(struct kvm_vcpu *vcpu, gpa_t addr, int len, cons
257249
if (offset + len > IOCSR_IPI_BUF_38 + 8) {
258250
kvm_err("%s: invalid offset or len: offset = %d, len = %d\n",
259251
__func__, offset, len);
260-
ret = -EINVAL;
261252
break;
262253
}
263254
write_mailbox(vcpu, offset, data, len);
@@ -266,18 +257,17 @@ static int loongarch_ipi_writel(struct kvm_vcpu *vcpu, gpa_t addr, int len, cons
266257
ipi_send(vcpu->kvm, data);
267258
break;
268259
case IOCSR_MAIL_SEND:
269-
ret = mail_send(vcpu->kvm, data);
260+
mail_send(vcpu->kvm, data);
270261
break;
271262
case IOCSR_ANY_SEND:
272-
ret = any_send(vcpu->kvm, data);
263+
any_send(vcpu->kvm, data);
273264
break;
274265
default:
275266
kvm_err("%s: unknown addr: %llx\n", __func__, addr);
276-
ret = -EINVAL;
277267
break;
278268
}
279269

280-
return ret;
270+
return 0;
281271
}
282272

283273
static int kvm_ipi_read(struct kvm_vcpu *vcpu,

‎arch/loongarch/kvm/intc/pch_pic.c‎

Lines changed: 14 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -74,7 +74,7 @@ void pch_msi_set_irq(struct kvm *kvm, int irq, int level)
7474

7575
static int loongarch_pch_pic_read(struct loongarch_pch_pic *s, gpa_t addr, int len, void *val)
7676
{
77-
int ret = 0, offset;
77+
int offset;
7878
u64 data = 0;
7979
void *ptemp;
8080

@@ -121,34 +121,32 @@ static int loongarch_pch_pic_read(struct loongarch_pch_pic *s, gpa_t addr, int l
121121
data = s->isr;
122122
break;
123123
default:
124-
ret = -EINVAL;
124+
break;
125125
}
126126
spin_unlock(&s->lock);
127127

128-
if (ret == 0) {
129-
offset = (addr - s->pch_pic_base) & 7;
130-
data = data >> (offset * 8);
131-
memcpy(val, &data, len);
132-
}
128+
offset = (addr - s->pch_pic_base) & 7;
129+
data = data >> (offset * 8);
130+
memcpy(val, &data, len);
133131

134-
return ret;
132+
return 0;
135133
}
136134

137135
static int kvm_pch_pic_read(struct kvm_vcpu *vcpu,
138136
struct kvm_io_device *dev,
139137
gpa_t addr, int len, void *val)
140138
{
141-
int ret;
139+
int ret = 0;
142140
struct loongarch_pch_pic *s = vcpu->kvm->arch.pch_pic;
143141

144142
if (!s) {
145143
kvm_err("%s: pch pic irqchip not valid!\n", __func__);
146-
return -EINVAL;
144+
return ret;
147145
}
148146

149147
if (addr & (len - 1)) {
150148
kvm_err("%s: pch pic not aligned addr %llx len %d\n", __func__, addr, len);
151-
return -EINVAL;
149+
return ret;
152150
}
153151

154152
/* statistics of pch pic reading */
@@ -161,7 +159,7 @@ static int kvm_pch_pic_read(struct kvm_vcpu *vcpu,
161159
static int loongarch_pch_pic_write(struct loongarch_pch_pic *s, gpa_t addr,
162160
int len, const void *val)
163161
{
164-
int ret = 0, offset;
162+
int offset;
165163
u64 old, data, mask;
166164
void *ptemp;
167165

@@ -226,29 +224,28 @@ static int loongarch_pch_pic_write(struct loongarch_pch_pic *s, gpa_t addr,
226224
case PCH_PIC_ROUTE_ENTRY_START ... PCH_PIC_ROUTE_ENTRY_END:
227225
break;
228226
default:
229-
ret = -EINVAL;
230227
break;
231228
}
232229
spin_unlock(&s->lock);
233230

234-
return ret;
231+
return 0;
235232
}
236233

237234
static int kvm_pch_pic_write(struct kvm_vcpu *vcpu,
238235
struct kvm_io_device *dev,
239236
gpa_t addr, int len, const void *val)
240237
{
241-
int ret;
238+
int ret = 0;
242239
struct loongarch_pch_pic *s = vcpu->kvm->arch.pch_pic;
243240

244241
if (!s) {
245242
kvm_err("%s: pch pic irqchip not valid!\n", __func__);
246-
return -EINVAL;
243+
return ret;
247244
}
248245

249246
if (addr & (len - 1)) {
250247
kvm_err("%s: pch pic not aligned addr %llx len %d\n", __func__, addr, len);
251-
return -EINVAL;
248+
return ret;
252249
}
253250

254251
/* statistics of pch pic writing */

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