clk: qcom: gcc: Add UFS_CARD and UFS_PHY GDSCs for SM8150

Add the UFS_CARD and UFS_PHY GDSC defines & driver structures
for SM8150.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220303082140.240745-2-bhupesh.sharma@linaro.org

Author: bhupesh-sharma

drivers/clk/qcom/gcc-sm8150.c

@@ -3466,6 +3466,24 @@ static struct gdsc pcie_1_gdsc = {
 	.flags = POLL_CFG_GDSCR,
 };
 
+static struct gdsc ufs_card_gdsc = {
+	.gdscr = 0x75004,
+	.pd = {
+		.name = "ufs_card_gdsc",
+	},
+	.pwrsts = PWRSTS_OFF_ON,
+	.flags = POLL_CFG_GDSCR,
+};
+
+static struct gdsc ufs_phy_gdsc = {
+	.gdscr = 0x77004,
+	.pd = {
+		.name = "ufs_phy_gdsc",
+	},
+	.pwrsts = PWRSTS_OFF_ON,
+	.flags = POLL_CFG_GDSCR,
+};
+
 static struct gdsc usb30_prim_gdsc = {
 		.gdscr = 0xf004,
 		.pd = {
@@ -3734,6 +3752,8 @@ static const struct qcom_reset_map gcc_sm8150_resets[] = {
 static struct gdsc *gcc_sm8150_gdscs[] = {
 	[PCIE_0_GDSC] = &pcie_0_gdsc,
 	[PCIE_1_GDSC] = &pcie_1_gdsc,
+	[UFS_CARD_GDSC] = &ufs_card_gdsc,
+	[UFS_PHY_GDSC] = &ufs_phy_gdsc,
 	[USB30_PRIM_GDSC] = &usb30_prim_gdsc,
 	[USB30_SEC_GDSC] = &usb30_sec_gdsc,
 };

include/dt-bindings/clock/qcom,gcc-sm8150.h

@@ -243,6 +243,8 @@
 /* GCC GDSCRs */
 #define PCIE_0_GDSC						0
 #define PCIE_1_GDSC						1
+#define UFS_CARD_GDSC						2
+#define UFS_PHY_GDSC						3
 #define USB30_PRIM_GDSC                     4
 #define USB30_SEC_GDSC						5