Skip to content

Commit 2fe1ef4

Browse files
xdarklightjbrun3t
authored andcommitted
clk: meson: gxbb: use the existing HHI_HDMI_PLL_CNTL3 macro
There's no need to calculate HHI_HDMI_PLL_CNTL + 8 when we have a HHI_HDMI_PLL_CNTL3 macro that has the correct offset already. No functional changes, this makes it easier to compare the driver with the datasheets. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/20260105204710.447779-4-martin.blumenstingl@googlemail.com Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
1 parent 7aa6c24 commit 2fe1ef4

1 file changed

Lines changed: 3 additions & 3 deletions

File tree

drivers/clk/meson/gxbb.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -362,7 +362,7 @@ static const struct clk_div_table gxl_hdmi_pll_od_div_table[] = {
362362

363363
static struct clk_regmap gxl_hdmi_pll_od = {
364364
.data = &(struct clk_regmap_div_data){
365-
.offset = HHI_HDMI_PLL_CNTL + 8,
365+
.offset = HHI_HDMI_PLL_CNTL3,
366366
.shift = 21,
367367
.width = 2,
368368
.table = gxl_hdmi_pll_od_div_table,
@@ -380,7 +380,7 @@ static struct clk_regmap gxl_hdmi_pll_od = {
380380

381381
static struct clk_regmap gxl_hdmi_pll_od2 = {
382382
.data = &(struct clk_regmap_div_data){
383-
.offset = HHI_HDMI_PLL_CNTL + 8,
383+
.offset = HHI_HDMI_PLL_CNTL3,
384384
.shift = 23,
385385
.width = 2,
386386
.table = gxl_hdmi_pll_od_div_table,
@@ -398,7 +398,7 @@ static struct clk_regmap gxl_hdmi_pll_od2 = {
398398

399399
static struct clk_regmap gxl_hdmi_pll = {
400400
.data = &(struct clk_regmap_div_data){
401-
.offset = HHI_HDMI_PLL_CNTL + 8,
401+
.offset = HHI_HDMI_PLL_CNTL3,
402402
.shift = 19,
403403
.width = 2,
404404
.table = gxl_hdmi_pll_od_div_table,

0 commit comments

Comments
 (0)