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muralimk-amdbp3tk0v
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EDAC/amd64: Split read_mc_regs() into dct/umc functions
Call them from their respective hw_info_get() paths. ECC symbol size is not needed on UMC systems, so determine_ecc_sym_sz() is left out of the UMC path. Do not save TOP_MEM* values on modern controllers because they're not needed there (read: they were used only for debugging, if anything). [ Yazen: rebased/reworked patch and reworded commit message. ] Signed-off-by: Muralidhara M K <muralidhara.mk@amd.com> Co-developed-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com> Signed-off-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com> Co-developed-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20230127170419.1824692-16-yazen.ghannam@amd.com
1 parent 78ec161 commit 32ecdf8

1 file changed

Lines changed: 4 additions & 13 deletions

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drivers/edac/amd64_edac.c

Lines changed: 4 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -3089,7 +3089,7 @@ static void determine_ecc_sym_sz(struct amd64_pvt *pvt)
30893089
/*
30903090
* Retrieve the hardware registers of the memory controller.
30913091
*/
3092-
static void __read_mc_regs_df(struct amd64_pvt *pvt)
3092+
static void umc_read_mc_regs(struct amd64_pvt *pvt)
30933093
{
30943094
u8 nid = pvt->mc_node_id;
30953095
struct amd64_umc *umc;
@@ -3113,7 +3113,7 @@ static void __read_mc_regs_df(struct amd64_pvt *pvt)
31133113
* Retrieve the hardware registers of the memory controller (this includes the
31143114
* 'Address Map' and 'Misc' device regs)
31153115
*/
3116-
static void read_mc_regs(struct amd64_pvt *pvt)
3116+
static void dct_read_mc_regs(struct amd64_pvt *pvt)
31173117
{
31183118
unsigned int range;
31193119
u64 msr_val;
@@ -3134,12 +3134,6 @@ static void read_mc_regs(struct amd64_pvt *pvt)
31343134
edac_dbg(0, " TOP_MEM2 disabled\n");
31353135
}
31363136

3137-
if (pvt->umc) {
3138-
__read_mc_regs_df(pvt);
3139-
3140-
goto skip;
3141-
}
3142-
31433137
amd64_read_pci_cfg(pvt->F3, NBCAP, &pvt->nbcap);
31443138

31453139
read_dram_ctl_register(pvt);
@@ -3180,9 +3174,6 @@ static void read_mc_regs(struct amd64_pvt *pvt)
31803174
amd64_read_dct_pci_cfg(pvt, 1, DCHR0, &pvt->dchr1);
31813175
}
31823176

3183-
skip:
3184-
3185-
31863177
determine_ecc_sym_sz(pvt);
31873178
}
31883179

@@ -3658,7 +3649,7 @@ static int dct_hw_info_get(struct amd64_pvt *pvt)
36583649

36593650
dct_prep_chip_selects(pvt);
36603651
dct_read_base_mask(pvt);
3661-
read_mc_regs(pvt);
3652+
dct_read_mc_regs(pvt);
36623653
dct_determine_memory_type(pvt);
36633654

36643655
return 0;
@@ -3672,7 +3663,7 @@ static int umc_hw_info_get(struct amd64_pvt *pvt)
36723663

36733664
umc_prep_chip_selects(pvt);
36743665
umc_read_base_mask(pvt);
3675-
read_mc_regs(pvt);
3666+
umc_read_mc_regs(pvt);
36763667
umc_determine_memory_type(pvt);
36773668

36783669
return 0;

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