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Merge tag 'x86-apic-2024-01-08' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 apic updates from Ingo Molnar: - Clean up 'struct apic': - Drop ::delivery_mode - Drop 'enum apic_delivery_modes' - Drop 'struct local_apic' - Fix comments * tag 'x86-apic-2024-01-08' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/ioapic: Remove unfinished sentence from comment x86/apic: Drop struct local_apic x86/apic: Drop enum apic_delivery_modes x86/apic: Drop apic::delivery_mode
2 parents ab5f3fc + 5e1c8a4 commit 33034c4

15 files changed

Lines changed: 12 additions & 293 deletions

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arch/x86/include/asm/apic.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -272,8 +272,6 @@ struct apic {
272272
void (*send_IPI_all)(int vector);
273273
void (*send_IPI_self)(int vector);
274274

275-
enum apic_delivery_modes delivery_mode;
276-
277275
u32 disable_esr : 1,
278276
dest_mode_logical : 1,
279277
x2apic_set_max_apicid : 1,

arch/x86/include/asm/apicdef.h

Lines changed: 7 additions & 269 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,13 @@
2020
*/
2121
#define IO_APIC_SLOT_SIZE 1024
2222

23+
#define APIC_DELIVERY_MODE_FIXED 0
24+
#define APIC_DELIVERY_MODE_LOWESTPRIO 1
25+
#define APIC_DELIVERY_MODE_SMI 2
26+
#define APIC_DELIVERY_MODE_NMI 4
27+
#define APIC_DELIVERY_MODE_INIT 5
28+
#define APIC_DELIVERY_MODE_EXTINT 7
29+
2330
#define APIC_ID 0x20
2431

2532
#define APIC_LVR 0x30
@@ -165,279 +172,10 @@
165172
#define APIC_CPUID(apicid) ((apicid) & XAPIC_DEST_CPUS_MASK)
166173
#define NUM_APIC_CLUSTERS ((BAD_APICID + 1) >> XAPIC_DEST_CPUS_SHIFT)
167174

168-
#ifndef __ASSEMBLY__
169-
/*
170-
* the local APIC register structure, memory mapped. Not terribly well
171-
* tested, but we might eventually use this one in the future - the
172-
* problem why we cannot use it right now is the P5 APIC, it has an
173-
* errata which cannot take 8-bit reads and writes, only 32-bit ones ...
174-
*/
175-
#define u32 unsigned int
176-
177-
struct local_apic {
178-
179-
/*000*/ struct { u32 __reserved[4]; } __reserved_01;
180-
181-
/*010*/ struct { u32 __reserved[4]; } __reserved_02;
182-
183-
/*020*/ struct { /* APIC ID Register */
184-
u32 __reserved_1 : 24,
185-
phys_apic_id : 4,
186-
__reserved_2 : 4;
187-
u32 __reserved[3];
188-
} id;
189-
190-
/*030*/ const
191-
struct { /* APIC Version Register */
192-
u32 version : 8,
193-
__reserved_1 : 8,
194-
max_lvt : 8,
195-
__reserved_2 : 8;
196-
u32 __reserved[3];
197-
} version;
198-
199-
/*040*/ struct { u32 __reserved[4]; } __reserved_03;
200-
201-
/*050*/ struct { u32 __reserved[4]; } __reserved_04;
202-
203-
/*060*/ struct { u32 __reserved[4]; } __reserved_05;
204-
205-
/*070*/ struct { u32 __reserved[4]; } __reserved_06;
206-
207-
/*080*/ struct { /* Task Priority Register */
208-
u32 priority : 8,
209-
__reserved_1 : 24;
210-
u32 __reserved_2[3];
211-
} tpr;
212-
213-
/*090*/ const
214-
struct { /* Arbitration Priority Register */
215-
u32 priority : 8,
216-
__reserved_1 : 24;
217-
u32 __reserved_2[3];
218-
} apr;
219-
220-
/*0A0*/ const
221-
struct { /* Processor Priority Register */
222-
u32 priority : 8,
223-
__reserved_1 : 24;
224-
u32 __reserved_2[3];
225-
} ppr;
226-
227-
/*0B0*/ struct { /* End Of Interrupt Register */
228-
u32 eoi;
229-
u32 __reserved[3];
230-
} eoi;
231-
232-
/*0C0*/ struct { u32 __reserved[4]; } __reserved_07;
233-
234-
/*0D0*/ struct { /* Logical Destination Register */
235-
u32 __reserved_1 : 24,
236-
logical_dest : 8;
237-
u32 __reserved_2[3];
238-
} ldr;
239-
240-
/*0E0*/ struct { /* Destination Format Register */
241-
u32 __reserved_1 : 28,
242-
model : 4;
243-
u32 __reserved_2[3];
244-
} dfr;
245-
246-
/*0F0*/ struct { /* Spurious Interrupt Vector Register */
247-
u32 spurious_vector : 8,
248-
apic_enabled : 1,
249-
focus_cpu : 1,
250-
__reserved_2 : 22;
251-
u32 __reserved_3[3];
252-
} svr;
253-
254-
/*100*/ struct { /* In Service Register */
255-
/*170*/ u32 bitfield;
256-
u32 __reserved[3];
257-
} isr [8];
258-
259-
/*180*/ struct { /* Trigger Mode Register */
260-
/*1F0*/ u32 bitfield;
261-
u32 __reserved[3];
262-
} tmr [8];
263-
264-
/*200*/ struct { /* Interrupt Request Register */
265-
/*270*/ u32 bitfield;
266-
u32 __reserved[3];
267-
} irr [8];
268-
269-
/*280*/ union { /* Error Status Register */
270-
struct {
271-
u32 send_cs_error : 1,
272-
receive_cs_error : 1,
273-
send_accept_error : 1,
274-
receive_accept_error : 1,
275-
__reserved_1 : 1,
276-
send_illegal_vector : 1,
277-
receive_illegal_vector : 1,
278-
illegal_register_address : 1,
279-
__reserved_2 : 24;
280-
u32 __reserved_3[3];
281-
} error_bits;
282-
struct {
283-
u32 errors;
284-
u32 __reserved_3[3];
285-
} all_errors;
286-
} esr;
287-
288-
/*290*/ struct { u32 __reserved[4]; } __reserved_08;
289-
290-
/*2A0*/ struct { u32 __reserved[4]; } __reserved_09;
291-
292-
/*2B0*/ struct { u32 __reserved[4]; } __reserved_10;
293-
294-
/*2C0*/ struct { u32 __reserved[4]; } __reserved_11;
295-
296-
/*2D0*/ struct { u32 __reserved[4]; } __reserved_12;
297-
298-
/*2E0*/ struct { u32 __reserved[4]; } __reserved_13;
299-
300-
/*2F0*/ struct { u32 __reserved[4]; } __reserved_14;
301-
302-
/*300*/ struct { /* Interrupt Command Register 1 */
303-
u32 vector : 8,
304-
delivery_mode : 3,
305-
destination_mode : 1,
306-
delivery_status : 1,
307-
__reserved_1 : 1,
308-
level : 1,
309-
trigger : 1,
310-
__reserved_2 : 2,
311-
shorthand : 2,
312-
__reserved_3 : 12;
313-
u32 __reserved_4[3];
314-
} icr1;
315-
316-
/*310*/ struct { /* Interrupt Command Register 2 */
317-
union {
318-
u32 __reserved_1 : 24,
319-
phys_dest : 4,
320-
__reserved_2 : 4;
321-
u32 __reserved_3 : 24,
322-
logical_dest : 8;
323-
} dest;
324-
u32 __reserved_4[3];
325-
} icr2;
326-
327-
/*320*/ struct { /* LVT - Timer */
328-
u32 vector : 8,
329-
__reserved_1 : 4,
330-
delivery_status : 1,
331-
__reserved_2 : 3,
332-
mask : 1,
333-
timer_mode : 1,
334-
__reserved_3 : 14;
335-
u32 __reserved_4[3];
336-
} lvt_timer;
337-
338-
/*330*/ struct { /* LVT - Thermal Sensor */
339-
u32 vector : 8,
340-
delivery_mode : 3,
341-
__reserved_1 : 1,
342-
delivery_status : 1,
343-
__reserved_2 : 3,
344-
mask : 1,
345-
__reserved_3 : 15;
346-
u32 __reserved_4[3];
347-
} lvt_thermal;
348-
349-
/*340*/ struct { /* LVT - Performance Counter */
350-
u32 vector : 8,
351-
delivery_mode : 3,
352-
__reserved_1 : 1,
353-
delivery_status : 1,
354-
__reserved_2 : 3,
355-
mask : 1,
356-
__reserved_3 : 15;
357-
u32 __reserved_4[3];
358-
} lvt_pc;
359-
360-
/*350*/ struct { /* LVT - LINT0 */
361-
u32 vector : 8,
362-
delivery_mode : 3,
363-
__reserved_1 : 1,
364-
delivery_status : 1,
365-
polarity : 1,
366-
remote_irr : 1,
367-
trigger : 1,
368-
mask : 1,
369-
__reserved_2 : 15;
370-
u32 __reserved_3[3];
371-
} lvt_lint0;
372-
373-
/*360*/ struct { /* LVT - LINT1 */
374-
u32 vector : 8,
375-
delivery_mode : 3,
376-
__reserved_1 : 1,
377-
delivery_status : 1,
378-
polarity : 1,
379-
remote_irr : 1,
380-
trigger : 1,
381-
mask : 1,
382-
__reserved_2 : 15;
383-
u32 __reserved_3[3];
384-
} lvt_lint1;
385-
386-
/*370*/ struct { /* LVT - Error */
387-
u32 vector : 8,
388-
__reserved_1 : 4,
389-
delivery_status : 1,
390-
__reserved_2 : 3,
391-
mask : 1,
392-
__reserved_3 : 15;
393-
u32 __reserved_4[3];
394-
} lvt_error;
395-
396-
/*380*/ struct { /* Timer Initial Count Register */
397-
u32 initial_count;
398-
u32 __reserved_2[3];
399-
} timer_icr;
400-
401-
/*390*/ const
402-
struct { /* Timer Current Count Register */
403-
u32 curr_count;
404-
u32 __reserved_2[3];
405-
} timer_ccr;
406-
407-
/*3A0*/ struct { u32 __reserved[4]; } __reserved_16;
408-
409-
/*3B0*/ struct { u32 __reserved[4]; } __reserved_17;
410-
411-
/*3C0*/ struct { u32 __reserved[4]; } __reserved_18;
412-
413-
/*3D0*/ struct { u32 __reserved[4]; } __reserved_19;
414-
415-
/*3E0*/ struct { /* Timer Divide Configuration Register */
416-
u32 divisor : 4,
417-
__reserved_1 : 28;
418-
u32 __reserved_2[3];
419-
} timer_dcr;
420-
421-
/*3F0*/ struct { u32 __reserved[4]; } __reserved_20;
422-
423-
} __attribute__ ((packed));
424-
425-
#undef u32
426-
427175
#ifdef CONFIG_X86_32
428176
#define BAD_APICID 0xFFu
429177
#else
430178
#define BAD_APICID 0xFFFFu
431179
#endif
432180

433-
enum apic_delivery_modes {
434-
APIC_DELIVERY_MODE_FIXED = 0,
435-
APIC_DELIVERY_MODE_LOWESTPRIO = 1,
436-
APIC_DELIVERY_MODE_SMI = 2,
437-
APIC_DELIVERY_MODE_NMI = 4,
438-
APIC_DELIVERY_MODE_INIT = 5,
439-
APIC_DELIVERY_MODE_EXTINT = 7,
440-
};
441-
442-
#endif /* !__ASSEMBLY__ */
443181
#endif /* _ASM_X86_APICDEF_H */

arch/x86/kernel/apic/apic_flat_64.c

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -82,7 +82,6 @@ static struct apic apic_flat __ro_after_init = {
8282
.acpi_madt_oem_check = flat_acpi_madt_oem_check,
8383
.apic_id_registered = default_apic_id_registered,
8484

85-
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
8685
.dest_mode_logical = true,
8786

8887
.disable_esr = 0,
@@ -154,7 +153,6 @@ static struct apic apic_physflat __ro_after_init = {
154153
.acpi_madt_oem_check = physflat_acpi_madt_oem_check,
155154
.apic_id_registered = default_apic_id_registered,
156155

157-
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
158156
.dest_mode_logical = false,
159157

160158
.disable_esr = 0,

arch/x86/kernel/apic/apic_noop.c

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Original file line numberDiff line numberDiff line change
@@ -47,7 +47,6 @@ static void noop_apic_write(u32 reg, u32 val)
4747
struct apic apic_noop __ro_after_init = {
4848
.name = "noop",
4949

50-
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
5150
.dest_mode_logical = true,
5251

5352
.disable_esr = 0,

arch/x86/kernel/apic/apic_numachip.c

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -222,7 +222,6 @@ static const struct apic apic_numachip1 __refconst = {
222222
.probe = numachip1_probe,
223223
.acpi_madt_oem_check = numachip1_acpi_madt_oem_check,
224224

225-
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
226225
.dest_mode_logical = false,
227226

228227
.disable_esr = 0,
@@ -259,7 +258,6 @@ static const struct apic apic_numachip2 __refconst = {
259258
.probe = numachip2_probe,
260259
.acpi_madt_oem_check = numachip2_acpi_madt_oem_check,
261260

262-
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
263261
.dest_mode_logical = false,
264262

265263
.disable_esr = 0,

arch/x86/kernel/apic/bigsmp_32.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -80,7 +80,6 @@ static struct apic apic_bigsmp __ro_after_init = {
8080
.name = "bigsmp",
8181
.probe = probe_bigsmp,
8282

83-
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
8483
.dest_mode_logical = false,
8584

8685
.disable_esr = 1,

arch/x86/kernel/apic/io_apic.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -997,7 +997,7 @@ static int alloc_isa_irq_from_domain(struct irq_domain *domain,
997997
/*
998998
* Legacy ISA IRQ has already been allocated, just add pin to
999999
* the pin list associated with this IRQ and program the IOAPIC
1000-
* entry. The IOAPIC entry
1000+
* entry.
10011001
*/
10021002
if (irq_data && irq_data->parent_data) {
10031003
if (!mp_check_pin_attr(irq, info))

arch/x86/kernel/apic/probe_32.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -45,7 +45,6 @@ static struct apic apic_default __ro_after_init = {
4545
.probe = probe_default,
4646
.apic_id_registered = default_apic_id_registered,
4747

48-
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
4948
.dest_mode_logical = true,
5049

5150
.disable_esr = 0,

arch/x86/kernel/apic/x2apic_cluster.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -227,7 +227,6 @@ static struct apic apic_x2apic_cluster __ro_after_init = {
227227
.probe = x2apic_cluster_probe,
228228
.acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
229229

230-
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
231230
.dest_mode_logical = true,
232231

233232
.disable_esr = 0,

arch/x86/kernel/apic/x2apic_phys.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -145,7 +145,6 @@ static struct apic apic_x2apic_phys __ro_after_init = {
145145
.probe = x2apic_phys_probe,
146146
.acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
147147

148-
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
149148
.dest_mode_logical = false,
150149

151150
.disable_esr = 0,

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