1010#include <linux/of.h>
1111#include <linux/platform_device.h>
1212#include <linux/rtc.h>
13+ #include <linux/goldfish.h>
1314
1415#define TIMER_TIME_LOW 0x00 /* get low bits of current time */
1516 /* and update TIMER_TIME_HIGH */
@@ -41,16 +42,16 @@ static int goldfish_rtc_read_alarm(struct device *dev,
4142 rtcdrv = dev_get_drvdata (dev );
4243 base = rtcdrv -> base ;
4344
44- rtc_alarm_low = readl (base + TIMER_ALARM_LOW );
45- rtc_alarm_high = readl (base + TIMER_ALARM_HIGH );
45+ rtc_alarm_low = gf_ioread32 (base + TIMER_ALARM_LOW );
46+ rtc_alarm_high = gf_ioread32 (base + TIMER_ALARM_HIGH );
4647 rtc_alarm = (rtc_alarm_high << 32 ) | rtc_alarm_low ;
4748
4849 do_div (rtc_alarm , NSEC_PER_SEC );
4950 memset (alrm , 0 , sizeof (struct rtc_wkalrm ));
5051
5152 rtc_time64_to_tm (rtc_alarm , & alrm -> time );
5253
53- if (readl (base + TIMER_ALARM_STATUS ))
54+ if (gf_ioread32 (base + TIMER_ALARM_STATUS ))
5455 alrm -> enabled = 1 ;
5556 else
5657 alrm -> enabled = 0 ;
@@ -71,18 +72,18 @@ static int goldfish_rtc_set_alarm(struct device *dev,
7172
7273 if (alrm -> enabled ) {
7374 rtc_alarm64 = rtc_tm_to_time64 (& alrm -> time ) * NSEC_PER_SEC ;
74- writel ((rtc_alarm64 >> 32 ), base + TIMER_ALARM_HIGH );
75- writel (rtc_alarm64 , base + TIMER_ALARM_LOW );
76- writel (1 , base + TIMER_IRQ_ENABLED );
75+ gf_iowrite32 ((rtc_alarm64 >> 32 ), base + TIMER_ALARM_HIGH );
76+ gf_iowrite32 (rtc_alarm64 , base + TIMER_ALARM_LOW );
77+ gf_iowrite32 (1 , base + TIMER_IRQ_ENABLED );
7778 } else {
7879 /*
7980 * if this function was called with enabled=0
8081 * then it could mean that the application is
8182 * trying to cancel an ongoing alarm
8283 */
83- rtc_status_reg = readl (base + TIMER_ALARM_STATUS );
84+ rtc_status_reg = gf_ioread32 (base + TIMER_ALARM_STATUS );
8485 if (rtc_status_reg )
85- writel (1 , base + TIMER_CLEAR_ALARM );
86+ gf_iowrite32 (1 , base + TIMER_CLEAR_ALARM );
8687 }
8788
8889 return 0 ;
@@ -98,9 +99,9 @@ static int goldfish_rtc_alarm_irq_enable(struct device *dev,
9899 base = rtcdrv -> base ;
99100
100101 if (enabled )
101- writel (1 , base + TIMER_IRQ_ENABLED );
102+ gf_iowrite32 (1 , base + TIMER_IRQ_ENABLED );
102103 else
103- writel (0 , base + TIMER_IRQ_ENABLED );
104+ gf_iowrite32 (0 , base + TIMER_IRQ_ENABLED );
104105
105106 return 0 ;
106107}
@@ -110,7 +111,7 @@ static irqreturn_t goldfish_rtc_interrupt(int irq, void *dev_id)
110111 struct goldfish_rtc * rtcdrv = dev_id ;
111112 void __iomem * base = rtcdrv -> base ;
112113
113- writel (1 , base + TIMER_CLEAR_INTERRUPT );
114+ gf_iowrite32 (1 , base + TIMER_CLEAR_INTERRUPT );
114115
115116 rtc_update_irq (rtcdrv -> rtc , 1 , RTC_IRQF | RTC_AF );
116117
@@ -128,8 +129,8 @@ static int goldfish_rtc_read_time(struct device *dev, struct rtc_time *tm)
128129 rtcdrv = dev_get_drvdata (dev );
129130 base = rtcdrv -> base ;
130131
131- time_low = readl (base + TIMER_TIME_LOW );
132- time_high = readl (base + TIMER_TIME_HIGH );
132+ time_low = gf_ioread32 (base + TIMER_TIME_LOW );
133+ time_high = gf_ioread32 (base + TIMER_TIME_HIGH );
133134 time = (time_high << 32 ) | time_low ;
134135
135136 do_div (time , NSEC_PER_SEC );
@@ -149,8 +150,8 @@ static int goldfish_rtc_set_time(struct device *dev, struct rtc_time *tm)
149150 base = rtcdrv -> base ;
150151
151152 now64 = rtc_tm_to_time64 (tm ) * NSEC_PER_SEC ;
152- writel ((now64 >> 32 ), base + TIMER_TIME_HIGH );
153- writel (now64 , base + TIMER_TIME_LOW );
153+ gf_iowrite32 ((now64 >> 32 ), base + TIMER_TIME_HIGH );
154+ gf_iowrite32 (now64 , base + TIMER_TIME_LOW );
154155
155156 return 0 ;
156157}
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