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x86/realmode: Make stack lock work in trampoline_compat()
The stack locking and stack assignment macro LOAD_REALMODE_ESP fails to work when invoked from the 64bit trampoline entry point: trampoline_start64 trampoline_compat LOAD_REALMODE_ESP <- lock Accessing tr_lock is only possible from 16bit mode. For the compat entry point this needs to be pa_tr_lock so that the required relocation entry is generated. Otherwise it locks the non-relocated address which is aside of being wrong never cleared in secondary_startup_64() causing all but the first CPU to get stuck on the lock. Make the macro take an argument lock_pa which defaults to 0 and rename it to LOCK_AND_LOAD_REALMODE_ESP to make it clear what this is about. Fixes: f6f1ae9 ("x86/smpboot: Implement a bit spinlock to protect the realmode stack") Reported-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Link: https://lore.kernel.org/r/87h6rujdvl.ffs@tglx
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1 file changed

Lines changed: 8 additions & 4 deletions

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arch/x86/realmode/rm/trampoline_64.S

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -37,12 +37,16 @@
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.text
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.code16
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40-
.macro LOAD_REALMODE_ESP
40+
.macro LOCK_AND_LOAD_REALMODE_ESP lock_pa=0
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/*
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* Make sure only one CPU fiddles with the realmode stack
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*/
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.Llock_rm\@:
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.if \lock_pa
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lock btsl $0, pa_tr_lock
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.else
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lock btsl $0, tr_lock
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.endif
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jnc 2f
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pause
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jmp .Llock_rm\@
@@ -63,7 +67,7 @@ SYM_CODE_START(trampoline_start)
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mov %ax, %es
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mov %ax, %ss
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66-
LOAD_REALMODE_ESP
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LOCK_AND_LOAD_REALMODE_ESP
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call verify_cpu # Verify the cpu supports long mode
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testl %eax, %eax # Check for return code
@@ -106,7 +110,7 @@ SYM_CODE_START(sev_es_trampoline_start)
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mov %ax, %es
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mov %ax, %ss
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109-
LOAD_REALMODE_ESP
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LOCK_AND_LOAD_REALMODE_ESP
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jmp .Lswitch_to_protected
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SYM_CODE_END(sev_es_trampoline_start)
@@ -189,7 +193,7 @@ SYM_CODE_START(pa_trampoline_compat)
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* In compatibility mode. Prep ESP and DX for startup_32, then disable
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* paging and complete the switch to legacy 32-bit mode.
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*/
192-
LOAD_REALMODE_ESP
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LOCK_AND_LOAD_REALMODE_ESP lock_pa=1
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movw $__KERNEL_DS, %dx
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movl $(CR0_STATE & ~X86_CR0_PG), %eax

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