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superna9999robclark
superna9999
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robclark
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drm/msm/dpu: move setup_force_clk_ctrl handling into plane and wb
Now SSPP and WB can have setup_force_clk_ctrl() ops, it's simpler to call them from the plane and wb code and call into the mdp ops if not present. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/562325/ Signed-off-by: Rob Clark <robdclark@chromium.org>
1 parent 87e9686 commit 346faac

4 files changed

Lines changed: 77 additions & 36 deletions

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‎drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c‎

Lines changed: 35 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,23 @@ static bool dpu_encoder_phys_wb_is_master(struct dpu_encoder_phys *phys_enc)
3434
return true;
3535
}
3636

37+
static bool _dpu_encoder_phys_wb_clk_force_ctrl(struct dpu_hw_wb *wb,
38+
struct dpu_hw_mdp *mdp,
39+
bool enable, bool *forced_on)
40+
{
41+
if (wb->ops.setup_clk_force_ctrl) {
42+
*forced_on = wb->ops.setup_clk_force_ctrl(wb, enable);
43+
return true;
44+
}
45+
46+
if (mdp->ops.setup_clk_force_ctrl) {
47+
*forced_on = mdp->ops.setup_clk_force_ctrl(mdp, wb->caps->clk_ctrl, enable);
48+
return true;
49+
}
50+
51+
return false;
52+
}
53+
3754
/**
3855
* dpu_encoder_phys_wb_set_ot_limit - set OT limit for writeback interface
3956
* @phys_enc: Pointer to physical encoder
@@ -43,6 +60,7 @@ static void dpu_encoder_phys_wb_set_ot_limit(
4360
{
4461
struct dpu_hw_wb *hw_wb = phys_enc->hw_wb;
4562
struct dpu_vbif_set_ot_params ot_params;
63+
bool forced_on = false;
4664

4765
memset(&ot_params, 0, sizeof(ot_params));
4866
ot_params.xin_id = hw_wb->caps->xin_id;
@@ -52,10 +70,17 @@ static void dpu_encoder_phys_wb_set_ot_limit(
5270
ot_params.is_wfd = true;
5371
ot_params.frame_rate = drm_mode_vrefresh(&phys_enc->cached_mode);
5472
ot_params.vbif_idx = hw_wb->caps->vbif_idx;
55-
ot_params.clk_ctrl = hw_wb->caps->clk_ctrl;
5673
ot_params.rd = false;
5774

75+
if (!_dpu_encoder_phys_wb_clk_force_ctrl(hw_wb, phys_enc->dpu_kms->hw_mdp,
76+
true, &forced_on))
77+
return;
78+
5879
dpu_vbif_set_ot_limit(phys_enc->dpu_kms, &ot_params);
80+
81+
if (forced_on)
82+
_dpu_encoder_phys_wb_clk_force_ctrl(hw_wb, phys_enc->dpu_kms->hw_mdp,
83+
false, &forced_on);
5984
}
6085

6186
/**
@@ -67,6 +92,7 @@ static void dpu_encoder_phys_wb_set_qos_remap(
6792
{
6893
struct dpu_hw_wb *hw_wb;
6994
struct dpu_vbif_set_qos_params qos_params;
95+
bool forced_on = false;
7096

7197
if (!phys_enc || !phys_enc->parent || !phys_enc->parent->crtc) {
7298
DPU_ERROR("invalid arguments\n");
@@ -83,7 +109,6 @@ static void dpu_encoder_phys_wb_set_qos_remap(
83109
memset(&qos_params, 0, sizeof(qos_params));
84110
qos_params.vbif_idx = hw_wb->caps->vbif_idx;
85111
qos_params.xin_id = hw_wb->caps->xin_id;
86-
qos_params.clk_ctrl = hw_wb->caps->clk_ctrl;
87112
qos_params.num = hw_wb->idx - WB_0;
88113
qos_params.is_rt = false;
89114

@@ -92,7 +117,15 @@ static void dpu_encoder_phys_wb_set_qos_remap(
92117
qos_params.vbif_idx,
93118
qos_params.xin_id, qos_params.is_rt);
94119

120+
if (!_dpu_encoder_phys_wb_clk_force_ctrl(hw_wb, phys_enc->dpu_kms->hw_mdp,
121+
true, &forced_on))
122+
return;
123+
95124
dpu_vbif_set_qos_remap(phys_enc->dpu_kms, &qos_params);
125+
126+
if (forced_on)
127+
_dpu_encoder_phys_wb_clk_force_ctrl(hw_wb, phys_enc->dpu_kms->hw_mdp,
128+
false, &forced_on);
96129
}
97130

98131
/**

‎drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c‎

Lines changed: 37 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -333,6 +333,23 @@ static void _dpu_plane_set_qos_ctrl(struct drm_plane *plane,
333333
enable);
334334
}
335335

336+
static bool _dpu_plane_sspp_clk_force_ctrl(struct dpu_hw_sspp *sspp,
337+
struct dpu_hw_mdp *mdp,
338+
bool enable, bool *forced_on)
339+
{
340+
if (sspp->ops.setup_clk_force_ctrl) {
341+
*forced_on = sspp->ops.setup_clk_force_ctrl(sspp, enable);
342+
return true;
343+
}
344+
345+
if (mdp->ops.setup_clk_force_ctrl) {
346+
*forced_on = mdp->ops.setup_clk_force_ctrl(mdp, sspp->cap->clk_ctrl, enable);
347+
return true;
348+
}
349+
350+
return false;
351+
}
352+
336353
/**
337354
* _dpu_plane_set_ot_limit - set OT limit for the given plane
338355
* @plane: Pointer to drm plane
@@ -348,6 +365,7 @@ static void _dpu_plane_set_ot_limit(struct drm_plane *plane,
348365
struct dpu_plane *pdpu = to_dpu_plane(plane);
349366
struct dpu_vbif_set_ot_params ot_params;
350367
struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);
368+
bool forced_on = false;
351369

352370
memset(&ot_params, 0, sizeof(ot_params));
353371
ot_params.xin_id = pipe->sspp->cap->xin_id;
@@ -357,10 +375,17 @@ static void _dpu_plane_set_ot_limit(struct drm_plane *plane,
357375
ot_params.is_wfd = !pdpu->is_rt_pipe;
358376
ot_params.frame_rate = frame_rate;
359377
ot_params.vbif_idx = VBIF_RT;
360-
ot_params.clk_ctrl = pipe->sspp->cap->clk_ctrl;
361378
ot_params.rd = true;
362379

380+
if (!_dpu_plane_sspp_clk_force_ctrl(pipe->sspp, dpu_kms->hw_mdp,
381+
true, &forced_on))
382+
return;
383+
363384
dpu_vbif_set_ot_limit(dpu_kms, &ot_params);
385+
386+
if (forced_on)
387+
_dpu_plane_sspp_clk_force_ctrl(pipe->sspp, dpu_kms->hw_mdp,
388+
false, &forced_on);
364389
}
365390

366391
/**
@@ -374,21 +399,28 @@ static void _dpu_plane_set_qos_remap(struct drm_plane *plane,
374399
struct dpu_plane *pdpu = to_dpu_plane(plane);
375400
struct dpu_vbif_set_qos_params qos_params;
376401
struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);
402+
bool forced_on = false;
377403

378404
memset(&qos_params, 0, sizeof(qos_params));
379405
qos_params.vbif_idx = VBIF_RT;
380-
qos_params.clk_ctrl = pipe->sspp->cap->clk_ctrl;
381406
qos_params.xin_id = pipe->sspp->cap->xin_id;
382407
qos_params.num = pipe->sspp->idx - SSPP_VIG0;
383408
qos_params.is_rt = pdpu->is_rt_pipe;
384409

385-
DPU_DEBUG_PLANE(pdpu, "pipe:%d vbif:%d xin:%d rt:%d, clk_ctrl:%d\n",
410+
DPU_DEBUG_PLANE(pdpu, "pipe:%d vbif:%d xin:%d rt:%d\n",
386411
qos_params.num,
387412
qos_params.vbif_idx,
388-
qos_params.xin_id, qos_params.is_rt,
389-
qos_params.clk_ctrl);
413+
qos_params.xin_id, qos_params.is_rt);
414+
415+
if (!_dpu_plane_sspp_clk_force_ctrl(pipe->sspp, dpu_kms->hw_mdp,
416+
true, &forced_on))
417+
return;
390418

391419
dpu_vbif_set_qos_remap(dpu_kms, &qos_params);
420+
421+
if (forced_on)
422+
_dpu_plane_sspp_clk_force_ctrl(pipe->sspp, dpu_kms->hw_mdp,
423+
false, &forced_on);
392424
}
393425

394426
static void _dpu_plane_setup_scaler3(struct dpu_hw_sspp *pipe_hw,

‎drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c‎

Lines changed: 5 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -169,23 +169,16 @@ void dpu_vbif_set_ot_limit(struct dpu_kms *dpu_kms,
169169
struct dpu_vbif_set_ot_params *params)
170170
{
171171
struct dpu_hw_vbif *vbif;
172-
struct dpu_hw_mdp *mdp;
173-
bool forced_on = false;
174172
u32 ot_lim;
175173
int ret;
176174

177-
mdp = dpu_kms->hw_mdp;
178-
179175
vbif = dpu_get_vbif(dpu_kms, params->vbif_idx);
180-
if (!vbif || !mdp) {
181-
DRM_DEBUG_ATOMIC("invalid arguments vbif %d mdp %d\n",
182-
vbif != NULL, mdp != NULL);
176+
if (!vbif) {
177+
DRM_DEBUG_ATOMIC("invalid arguments vbif %d\n", vbif != NULL);
183178
return;
184179
}
185180

186-
if (!mdp->ops.setup_clk_force_ctrl ||
187-
!vbif->ops.set_limit_conf ||
188-
!vbif->ops.set_halt_ctrl)
181+
if (!vbif->ops.set_limit_conf || !vbif->ops.set_halt_ctrl)
189182
return;
190183

191184
/* set write_gather_en for all write clients */
@@ -200,8 +193,6 @@ void dpu_vbif_set_ot_limit(struct dpu_kms *dpu_kms,
200193
trace_dpu_perf_set_ot(params->num, params->xin_id, ot_lim,
201194
params->vbif_idx);
202195

203-
forced_on = mdp->ops.setup_clk_force_ctrl(mdp, params->clk_ctrl, true);
204-
205196
vbif->ops.set_limit_conf(vbif, params->xin_id, params->rd, ot_lim);
206197

207198
vbif->ops.set_halt_ctrl(vbif, params->xin_id, true);
@@ -211,25 +202,19 @@ void dpu_vbif_set_ot_limit(struct dpu_kms *dpu_kms,
211202
trace_dpu_vbif_wait_xin_halt_fail(vbif->idx, params->xin_id);
212203

213204
vbif->ops.set_halt_ctrl(vbif, params->xin_id, false);
214-
215-
if (forced_on)
216-
mdp->ops.setup_clk_force_ctrl(mdp, params->clk_ctrl, false);
217205
}
218206

219207
void dpu_vbif_set_qos_remap(struct dpu_kms *dpu_kms,
220208
struct dpu_vbif_set_qos_params *params)
221209
{
222210
struct dpu_hw_vbif *vbif;
223-
struct dpu_hw_mdp *mdp;
224-
bool forced_on = false;
225211
const struct dpu_vbif_qos_tbl *qos_tbl;
226212
int i;
227213

228-
if (!params || !dpu_kms->hw_mdp) {
214+
if (!params) {
229215
DPU_ERROR("invalid arguments\n");
230216
return;
231217
}
232-
mdp = dpu_kms->hw_mdp;
233218

234219
vbif = dpu_get_vbif(dpu_kms, params->vbif_idx);
235220

@@ -238,7 +223,7 @@ void dpu_vbif_set_qos_remap(struct dpu_kms *dpu_kms,
238223
return;
239224
}
240225

241-
if (!vbif->ops.set_qos_remap || !mdp->ops.setup_clk_force_ctrl) {
226+
if (!vbif->ops.set_qos_remap) {
242227
DRM_DEBUG_ATOMIC("qos remap not supported\n");
243228
return;
244229
}
@@ -251,18 +236,13 @@ void dpu_vbif_set_qos_remap(struct dpu_kms *dpu_kms,
251236
return;
252237
}
253238

254-
forced_on = mdp->ops.setup_clk_force_ctrl(mdp, params->clk_ctrl, true);
255-
256239
for (i = 0; i < qos_tbl->npriority_lvl; i++) {
257240
DRM_DEBUG_ATOMIC("%s xin:%d lvl:%d/%d\n",
258241
dpu_vbif_name(params->vbif_idx), params->xin_id, i,
259242
qos_tbl->priority_lvl[i]);
260243
vbif->ops.set_qos_remap(vbif, params->xin_id, i,
261244
qos_tbl->priority_lvl[i]);
262245
}
263-
264-
if (forced_on)
265-
mdp->ops.setup_clk_force_ctrl(mdp, params->clk_ctrl, false);
266246
}
267247

268248
void dpu_vbif_clear_errors(struct dpu_kms *dpu_kms)

‎drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.h‎

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -16,28 +16,24 @@ struct dpu_vbif_set_ot_params {
1616
bool rd;
1717
bool is_wfd;
1818
u32 vbif_idx;
19-
u32 clk_ctrl;
2019
};
2120

2221
struct dpu_vbif_set_memtype_params {
2322
u32 xin_id;
2423
u32 vbif_idx;
25-
u32 clk_ctrl;
2624
bool is_cacheable;
2725
};
2826

2927
/**
3028
* struct dpu_vbif_set_qos_params - QoS remapper parameter
3129
* @vbif_idx: vbif identifier
3230
* @xin_id: client interface identifier
33-
* @clk_ctrl: clock control identifier of the xin
3431
* @num: pipe identifier (debug only)
3532
* @is_rt: true if pipe is used in real-time use case
3633
*/
3734
struct dpu_vbif_set_qos_params {
3835
u32 vbif_idx;
3936
u32 xin_id;
40-
u32 clk_ctrl;
4137
u32 num;
4238
bool is_rt;
4339
};

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