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RayyanAnsarikwilczynski
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dt-bindings: PCI: qcom,pcie-sc7280: Update bindings adding eight interrupts
Previous commit to this bindings, commit 756485b ("dt-bindings: PCI: qcom,pcie-sc7280: Move SC7280 to dedicated schema"), updated the bindings to specify one interrupt only, as the devicetree at that time did not describe the hardware fully. The devicetree for SC7280 now specifies eight interrupts, following the commit b8ba66b ("arm64: dts: qcom: sc7280: Add additional MSI interrupts"). Thus, update the bindings to reflect this. Link: https://lore.kernel.org/linux-pci/20240722-sc7280-pcie-interrupts-v2-1-a5414d3dbc64@linaro.org Signed-off-by: Rayyan Ansari <rayyan.ansari@linaro.org> [kwilczynski: commit log] Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml

Lines changed: 20 additions & 4 deletions
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@@ -53,11 +53,19 @@ properties:
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- const: aggre1 # Aggre NoC PCIe1 AXI clock
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interrupts:
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maxItems: 1
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minItems: 8
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maxItems: 8
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interrupt-names:
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items:
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- const: msi
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- const: msi0
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- const: msi1
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- const: msi2
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- const: msi3
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- const: msi4
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- const: msi5
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- const: msi6
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- const: msi7
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resets:
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maxItems: 1
@@ -137,8 +145,16 @@ examples:
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dma-coherent;
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interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "msi";
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interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "msi0", "msi1", "msi2", "msi3",
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"msi4", "msi5", "msi6", "msi7";
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0x7>;
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interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>,

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