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Ben Skeggsairlied
Ben Skeggs
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airlied
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drm/nouveau/gsp/r535: add support for rm alloc
Adds the plumbing to be able to allocate and free RM objects, and implements RM client/device/subdevice allocation with it. These will be used by subsequent patches. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-35-skeggsb@gmail.com
1 parent 4cf2c83 commit 37e328a

8 files changed

Lines changed: 518 additions & 0 deletions

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‎drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h‎

Lines changed: 131 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -158,7 +158,24 @@ struct nvkm_gsp {
158158
void *(*rm_ctrl_get)(struct nvkm_gsp_object *, u32 cmd, u32 argc);
159159
void *(*rm_ctrl_push)(struct nvkm_gsp_object *, void *argv, u32 repc);
160160
void (*rm_ctrl_done)(struct nvkm_gsp_object *, void *repv);
161+
162+
void *(*rm_alloc_get)(struct nvkm_gsp_object *, u32 oclass, u32 argc);
163+
void *(*rm_alloc_push)(struct nvkm_gsp_object *, void *argv, u32 repc);
164+
void (*rm_alloc_done)(struct nvkm_gsp_object *, void *repv);
165+
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int (*rm_free)(struct nvkm_gsp_object *);
167+
168+
int (*client_ctor)(struct nvkm_gsp *, struct nvkm_gsp_client *);
169+
void (*client_dtor)(struct nvkm_gsp_client *);
170+
171+
int (*device_ctor)(struct nvkm_gsp_client *, struct nvkm_gsp_device *);
172+
void (*device_dtor)(struct nvkm_gsp_device *);
161173
} *rm;
174+
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struct {
176+
struct mutex mutex;;
177+
struct idr idr;
178+
} client_id;
162179
};
163180

164181
static inline bool
@@ -247,6 +264,120 @@ nvkm_gsp_rm_ctrl_done(struct nvkm_gsp_object *object, void *repv)
247264
object->client->gsp->rm->rm_ctrl_done(object, repv);
248265
}
249266

267+
static inline void *
268+
nvkm_gsp_rm_alloc_get(struct nvkm_gsp_object *parent, u32 handle, u32 oclass, u32 argc,
269+
struct nvkm_gsp_object *object)
270+
{
271+
struct nvkm_gsp_client *client = parent->client;
272+
struct nvkm_gsp *gsp = client->gsp;
273+
void *argv;
274+
275+
object->client = parent->client;
276+
object->parent = parent;
277+
object->handle = handle;
278+
279+
argv = gsp->rm->rm_alloc_get(object, oclass, argc);
280+
if (IS_ERR_OR_NULL(argv)) {
281+
object->client = NULL;
282+
return argv;
283+
}
284+
285+
return argv;
286+
}
287+
288+
static inline void *
289+
nvkm_gsp_rm_alloc_push(struct nvkm_gsp_object *object, void *argv, u32 repc)
290+
{
291+
void *repv = object->client->gsp->rm->rm_alloc_push(object, argv, repc);
292+
293+
if (IS_ERR(repv))
294+
object->client = NULL;
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296+
return repv;
297+
}
298+
299+
static inline int
300+
nvkm_gsp_rm_alloc_wr(struct nvkm_gsp_object *object, void *argv)
301+
{
302+
void *repv = nvkm_gsp_rm_alloc_push(object, argv, 0);
303+
304+
if (IS_ERR(repv))
305+
return PTR_ERR(repv);
306+
307+
return 0;
308+
}
309+
310+
static inline void
311+
nvkm_gsp_rm_alloc_done(struct nvkm_gsp_object *object, void *repv)
312+
{
313+
object->client->gsp->rm->rm_alloc_done(object, repv);
314+
}
315+
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static inline int
317+
nvkm_gsp_rm_alloc(struct nvkm_gsp_object *parent, u32 handle, u32 oclass, u32 argc,
318+
struct nvkm_gsp_object *object)
319+
{
320+
void *argv = nvkm_gsp_rm_alloc_get(parent, handle, oclass, argc, object);
321+
322+
if (IS_ERR_OR_NULL(argv))
323+
return argv ? PTR_ERR(argv) : -EIO;
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return nvkm_gsp_rm_alloc_wr(object, argv);
326+
}
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static inline int
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nvkm_gsp_rm_free(struct nvkm_gsp_object *object)
330+
{
331+
if (object->client)
332+
return object->client->gsp->rm->rm_free(object);
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return 0;
335+
}
336+
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static inline int
338+
nvkm_gsp_client_ctor(struct nvkm_gsp *gsp, struct nvkm_gsp_client *client)
339+
{
340+
if (WARN_ON(!gsp->rm))
341+
return -ENOSYS;
342+
343+
return gsp->rm->client_ctor(gsp, client);
344+
}
345+
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static inline void
347+
nvkm_gsp_client_dtor(struct nvkm_gsp_client *client)
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{
349+
if (client->gsp)
350+
client->gsp->rm->client_dtor(client);
351+
}
352+
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static inline int
354+
nvkm_gsp_device_ctor(struct nvkm_gsp_client *client, struct nvkm_gsp_device *device)
355+
{
356+
return client->gsp->rm->device_ctor(client, device);
357+
}
358+
359+
static inline void
360+
nvkm_gsp_device_dtor(struct nvkm_gsp_device *device)
361+
{
362+
if (device->object.client)
363+
device->object.client->gsp->rm->device_dtor(device);
364+
}
365+
366+
static inline int
367+
nvkm_gsp_client_device_ctor(struct nvkm_gsp *gsp,
368+
struct nvkm_gsp_client *client, struct nvkm_gsp_device *device)
369+
{
370+
int ret = nvkm_gsp_client_ctor(gsp, client);
371+
372+
if (ret == 0) {
373+
ret = nvkm_gsp_device_ctor(client, device);
374+
if (ret)
375+
nvkm_gsp_client_dtor(client);
376+
}
377+
378+
return ret;
379+
}
380+
250381
int gv100_gsp_new(struct nvkm_device *, enum nvkm_subdev_type, int, struct nvkm_gsp **);
251382
int tu102_gsp_new(struct nvkm_device *, enum nvkm_subdev_type, int, struct nvkm_gsp **);
252383
int tu116_gsp_new(struct nvkm_device *, enum nvkm_subdev_type, int, struct nvkm_gsp **);

‎drivers/gpu/drm/nouveau/include/nvrm/535.54.03/common/sdk/nvidia/inc/class/cl0000.h‎

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@@ -0,0 +1,38 @@
1+
#ifndef __src_common_sdk_nvidia_inc_class_cl0000_h__
2+
#define __src_common_sdk_nvidia_inc_class_cl0000_h__
3+
#include <nvrm/535.54.03/common/sdk/nvidia/inc/nvlimits.h>
4+
5+
/* Excerpt of RM headers from https://github.com/NVIDIA/open-gpu-kernel-modules/tree/535.54.03 */
6+
7+
/*
8+
* SPDX-FileCopyrightText: Copyright (c) 2001-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
9+
* SPDX-License-Identifier: MIT
10+
*
11+
* Permission is hereby granted, free of charge, to any person obtaining a
12+
* copy of this software and associated documentation files (the "Software"),
13+
* to deal in the Software without restriction, including without limitation
14+
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
15+
* and/or sell copies of the Software, and to permit persons to whom the
16+
* Software is furnished to do so, subject to the following conditions:
17+
*
18+
* The above copyright notice and this permission notice shall be included in
19+
* all copies or substantial portions of the Software.
20+
*
21+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
22+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
23+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
24+
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
25+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
26+
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
27+
* DEALINGS IN THE SOFTWARE.
28+
*/
29+
30+
#define NV01_ROOT (0x0U) /* finn: Evaluated from "NV0000_ALLOC_PARAMETERS_MESSAGE_ID" */
31+
32+
typedef struct NV0000_ALLOC_PARAMETERS {
33+
NvHandle hClient; /* CORERM-2934: hClient must remain the first member until all allocations use these params */
34+
NvU32 processID;
35+
char processName[NV_PROC_NAME_MAX_LENGTH];
36+
} NV0000_ALLOC_PARAMETERS;
37+
38+
#endif

‎drivers/gpu/drm/nouveau/include/nvrm/535.54.03/common/sdk/nvidia/inc/class/cl0080.h‎

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@@ -0,0 +1,43 @@
1+
#ifndef __src_common_sdk_nvidia_inc_class_cl0080_h__
2+
#define __src_common_sdk_nvidia_inc_class_cl0080_h__
3+
4+
/* Excerpt of RM headers from https://github.com/NVIDIA/open-gpu-kernel-modules/tree/535.54.03 */
5+
6+
/*
7+
* SPDX-FileCopyrightText: Copyright (c) 2001-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
8+
* SPDX-License-Identifier: MIT
9+
*
10+
* Permission is hereby granted, free of charge, to any person obtaining a
11+
* copy of this software and associated documentation files (the "Software"),
12+
* to deal in the Software without restriction, including without limitation
13+
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
14+
* and/or sell copies of the Software, and to permit persons to whom the
15+
* Software is furnished to do so, subject to the following conditions:
16+
*
17+
* The above copyright notice and this permission notice shall be included in
18+
* all copies or substantial portions of the Software.
19+
*
20+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23+
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
24+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
25+
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
26+
* DEALINGS IN THE SOFTWARE.
27+
*/
28+
29+
#define NV01_DEVICE_0 (0x80U) /* finn: Evaluated from "NV0080_ALLOC_PARAMETERS_MESSAGE_ID" */
30+
31+
typedef struct NV0080_ALLOC_PARAMETERS {
32+
NvU32 deviceId;
33+
NvHandle hClientShare;
34+
NvHandle hTargetClient;
35+
NvHandle hTargetDevice;
36+
NvV32 flags;
37+
NV_DECLARE_ALIGNED(NvU64 vaSpaceSize, 8);
38+
NV_DECLARE_ALIGNED(NvU64 vaStartInternal, 8);
39+
NV_DECLARE_ALIGNED(NvU64 vaLimitInternal, 8);
40+
NvV32 vaMode;
41+
} NV0080_ALLOC_PARAMETERS;
42+
43+
#endif

‎drivers/gpu/drm/nouveau/include/nvrm/535.54.03/common/sdk/nvidia/inc/class/cl2080.h‎

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,35 @@
1+
#ifndef __src_common_sdk_nvidia_inc_class_cl2080_h__
2+
#define __src_common_sdk_nvidia_inc_class_cl2080_h__
3+
4+
/* Excerpt of RM headers from https://github.com/NVIDIA/open-gpu-kernel-modules/tree/535.54.03 */
5+
6+
/*
7+
* SPDX-FileCopyrightText: Copyright (c) 2002-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
8+
* SPDX-License-Identifier: MIT
9+
*
10+
* Permission is hereby granted, free of charge, to any person obtaining a
11+
* copy of this software and associated documentation files (the "Software"),
12+
* to deal in the Software without restriction, including without limitation
13+
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
14+
* and/or sell copies of the Software, and to permit persons to whom the
15+
* Software is furnished to do so, subject to the following conditions:
16+
*
17+
* The above copyright notice and this permission notice shall be included in
18+
* all copies or substantial portions of the Software.
19+
*
20+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23+
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
24+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
25+
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
26+
* DEALINGS IN THE SOFTWARE.
27+
*/
28+
29+
#define NV20_SUBDEVICE_0 (0x2080U) /* finn: Evaluated from "NV2080_ALLOC_PARAMETERS_MESSAGE_ID" */
30+
31+
typedef struct NV2080_ALLOC_PARAMETERS {
32+
NvU32 subDeviceId;
33+
} NV2080_ALLOC_PARAMETERS;
34+
35+
#endif

‎drivers/gpu/drm/nouveau/include/nvrm/535.54.03/common/sdk/nvidia/inc/nvlimits.h‎

Lines changed: 31 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,31 @@
1+
#ifndef __src_common_sdk_nvidia_inc_nvlimits_h__
2+
#define __src_common_sdk_nvidia_inc_nvlimits_h__
3+
4+
/* Excerpt of RM headers from https://github.com/NVIDIA/open-gpu-kernel-modules/tree/535.54.03 */
5+
6+
/*
7+
* SPDX-FileCopyrightText: Copyright (c) 2017 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
8+
* SPDX-License-Identifier: MIT
9+
*
10+
* Permission is hereby granted, free of charge, to any person obtaining a
11+
* copy of this software and associated documentation files (the "Software"),
12+
* to deal in the Software without restriction, including without limitation
13+
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
14+
* and/or sell copies of the Software, and to permit persons to whom the
15+
* Software is furnished to do so, subject to the following conditions:
16+
*
17+
* The above copyright notice and this permission notice shall be included in
18+
* all copies or substantial portions of the Software.
19+
*
20+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23+
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
24+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
25+
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
26+
* DEALINGS IN THE SOFTWARE.
27+
*/
28+
29+
#define NV_PROC_NAME_MAX_LENGTH 100U
30+
31+
#endif

‎drivers/gpu/drm/nouveau/include/nvrm/535.54.03/nvidia/generated/g_rpc-structures.h‎

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Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
11
#ifndef __src_nvidia_generated_g_rpc_structures_h__
22
#define __src_nvidia_generated_g_rpc_structures_h__
3+
#include <nvrm/535.54.03/nvidia/generated/g_sdk-structures.h>
34

45
/* Excerpt of RM headers from https://github.com/NVIDIA/open-gpu-kernel-modules/tree/535.54.03 */
56

@@ -26,13 +27,31 @@
2627
* DEALINGS IN THE SOFTWARE.
2728
*/
2829

30+
typedef struct rpc_free_v03_00
31+
{
32+
NVOS00_PARAMETERS_v03_00 params;
33+
} rpc_free_v03_00;
34+
2935
typedef struct rpc_unloading_guest_driver_v1F_07
3036
{
3137
NvBool bInPMTransition;
3238
NvBool bGc6Entering;
3339
NvU32 newLevel;
3440
} rpc_unloading_guest_driver_v1F_07;
3541

42+
typedef struct rpc_gsp_rm_alloc_v03_00
43+
{
44+
NvHandle hClient;
45+
NvHandle hParent;
46+
NvHandle hObject;
47+
NvU32 hClass;
48+
NvU32 status;
49+
NvU32 paramsSize;
50+
NvU32 flags;
51+
NvU8 reserved[4];
52+
NvU8 params[];
53+
} rpc_gsp_rm_alloc_v03_00;
54+
3655
typedef struct rpc_gsp_rm_control_v03_00
3756
{
3857
NvHandle hClient;

‎drivers/gpu/drm/nouveau/include/nvrm/535.54.03/nvidia/generated/g_sdk-structures.h‎

Lines changed: 37 additions & 0 deletions
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@@ -0,0 +1,37 @@
1+
#ifndef __src_nvidia_generated_g_sdk_structures_h__
2+
#define __src_nvidia_generated_g_sdk_structures_h__
3+
4+
/* Excerpt of RM headers from https://github.com/NVIDIA/open-gpu-kernel-modules/tree/535.54.03 */
5+
6+
/*
7+
* SPDX-FileCopyrightText: Copyright (c) 2008-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
8+
* SPDX-License-Identifier: MIT
9+
*
10+
* Permission is hereby granted, free of charge, to any person obtaining a
11+
* copy of this software and associated documentation files (the "Software"),
12+
* to deal in the Software without restriction, including without limitation
13+
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
14+
* and/or sell copies of the Software, and to permit persons to whom the
15+
* Software is furnished to do so, subject to the following conditions:
16+
*
17+
* The above copyright notice and this permission notice shall be included in
18+
* all copies or substantial portions of the Software.
19+
*
20+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23+
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
24+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
25+
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
26+
* DEALINGS IN THE SOFTWARE.
27+
*/
28+
29+
typedef struct NVOS00_PARAMETERS_v03_00
30+
{
31+
NvHandle hRoot;
32+
NvHandle hObjectParent;
33+
NvHandle hObjectOld;
34+
NvV32 status;
35+
} NVOS00_PARAMETERS_v03_00;
36+
37+
#endif

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