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vgovind2Radhakrishna Sripada
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drm/i915: update the QGV point frequency calculations
From MTL onwwards, pcode locks the QGV point based on peak BW of the intended QGV point passed by the driver. So the peak BW calculation must match the value expected by the pcode. Update the calculations as per the Bspec. v2: use DIV_ROUND_* macro for the calculations (Ville) v3: Use only DIV_ROUN_CLOSEST and remove divisor / 2 again Bspec: 64636 Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230606093509.221709-3-vinod.govindapillai@intel.com
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drivers/gpu/drm/i915/display/intel_bw.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -182,7 +182,7 @@ static int mtl_read_qgv_point_info(struct drm_i915_private *dev_priv,
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val2 = intel_uncore_read(&dev_priv->uncore,
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MTL_MEM_SS_INFO_QGV_POINT_HIGH(point));
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dclk = REG_FIELD_GET(MTL_DCLK_MASK, val);
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sp->dclk = DIV_ROUND_UP((16667 * dclk), 1000);
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sp->dclk = DIV_ROUND_CLOSEST(16667 * dclk, 1000);
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sp->t_rp = REG_FIELD_GET(MTL_TRP_MASK, val);
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sp->t_rcd = REG_FIELD_GET(MTL_TRCD_MASK, val);
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