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Merge tag 'amlogic-arm64-dt-for-v6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt
Amlogic ARM64 DT for v6.20: - Cleanups: - Use lowercase hex - Use hyphen in node names - move CPU OPP table and clock assignment to SoC.dtsi - drop useless assigned-clock-parents - MMC clock fixup across multiple families - Add type-c controller on Radxa Zero 2 and enable NPU - New board: - Khadas VIM1s based on Amlogic S4 * tag 'amlogic-arm64-dt-for-v6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: arm64: dts: amlogic: meson-s4-s905y4-khadas-vim1s: enable SDIO interface arm64: dts: amlogic: add the type-c controller on Radxa Zero 2 arm64: dts: amlogic: meson-sm1-odroid: Eliminate Odroid HC4 power glitches during boot. arm64: dts: amlogic: meson-s4-s905y4-khadas-vim1s: enable eMMC storage arm64: dts: meson-s4-s905y4-khadas-vim1s: add initial device tree arm64: dts: meson-s4-aq222: update compatible string with s805x2 dt-bindings: arm: amlogic: introduce specific compatibles for S4 family arm64: dts: amlogic: Enable the npu node on Radxa Zero 2 arm64: dts: amlogic: g12: assign the MMC A signal clock arm64: dts: amlogic: g12: assign the MMC B and C signal clocks arm64: dts: amlogic: gx: assign the MMC signal clocks arm64: dts: amlogic: axg: assign the MMC signal clocks arm64: dts: amlogic: a1: align the mmc clock setup arm64: dts: amlogic: c3: assign the MMC signal clocks arm64: dts: amlogic: s4: fix mmc clock assignment arm64: dts: amlogic: s4: assign mmc b clock to 24MHz arm64: dts: amlogic: drop useless assigned-clock-parents arm64: dts: amlogic: move CPU OPP table and clock assignment to SoC.dtsi arm64: dts: amlogic: Use lowercase hex arm64: dts: amlogic: Use hyphen in node names Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 parents 332a1ff + 854583f commit 3b2db85

79 files changed

Lines changed: 442 additions & 247 deletions

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‎Documentation/devicetree/bindings/arm/amlogic.yaml‎

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@@ -245,6 +245,14 @@ properties:
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items:
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- enum:
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- amlogic,aq222
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- const: amlogic,s805x2
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- const: amlogic,s4
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- description: Boards with the Amlogic Meson S4 S905Y4 SoC
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items:
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- enum:
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- khadas,vim1s
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- const: amlogic,s905y4
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- const: amlogic,s4
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- description: Boards with the Amlogic S6 S905X5 SoC

‎arch/arm64/boot/dts/amlogic/Makefile‎

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@@ -85,6 +85,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-ugoos-am3.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-gxm-vega-s96.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-gxm-wetek-core2.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-s4-s805x2-aq222.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-s4-s905y4-khadas-vim1s.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-sm1-a95xf3-air-gbit.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-sm1-a95xf3-air.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-sm1-bananapi-m2-pro.dtb

‎arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi‎

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@@ -108,7 +108,7 @@
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firmware {
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scmi: scmi {
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compatible = "arm,scmi-smc";
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arm,smc-id = <0x820000C1>;
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arm,smc-id = <0x820000c1>;
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shmem = <&scmi_shmem>;
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#address-cells = <1>;
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#size-cells = <0>;
@@ -780,7 +780,7 @@
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#address-cells = <1>;
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#size-cells = <0>;
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internal_ephy: ethernet_phy@8 {
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internal_ephy: ethernet-phy@8 {
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compatible = "ethernet-phy-id0180.3301",
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"ethernet-phy-ieee802.3-c22";
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interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
@@ -969,6 +969,10 @@
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no-sd;
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resets = <&reset RESET_SD_EMMC_A>;
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status = "disabled";
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assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_A>;
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assigned-clock-rates = <24000000>;
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};
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sd: mmc@8a000 {
@@ -984,12 +988,15 @@
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no-sdio;
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resets = <&reset RESET_SD_EMMC_B>;
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status = "disabled";
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assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_B>;
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assigned-clock-rates = <24000000>;
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};
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nand: nand-controller@8d000 {
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compatible = "amlogic,meson-axg-nfc";
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reg = <0x0 0x8d000 0x0 0x200>,
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<0x0 0x8C000 0x0 0x4>;
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<0x0 0x8c000 0x0 0x4>;
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reg-names = "nfc", "emmc";
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interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_C>,

‎arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-an400.dts‎

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@@ -20,7 +20,7 @@
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memory@0 {
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device_type = "memory";
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reg = <0x00000000 0x00000000 0x00000000 0xE0000000
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reg = <0x00000000 0x00000000 0x00000000 0xe0000000
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0x00000001 0x00000000 0x00000000 0x20000000>;
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};
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‎arch/arm64/boot/dts/amlogic/meson-a1.dtsi‎

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clock-names = "core",
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"clkin0",
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"clkin1";
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assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_SEL2>;
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assigned-clock-parents = <&xtal>;
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resets = <&reset RESET_SD_EMMC_A>;
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power-domains = <&pwrc PWRC_SD_EMMC_ID>;
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status = "disabled";
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assigned-clocks = <&clkc_periphs CLKID_SD_EMMC>;
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assigned-clock-rates = <24000000>;
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};
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};
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‎arch/arm64/boot/dts/amlogic/meson-axg-s400.dts‎

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@@ -275,7 +275,6 @@
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assigned-clocks = <&clkc CLKID_HIFI_PLL>,
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<&clkc CLKID_MPLL0>,
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<&clkc CLKID_MPLL1>;
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assigned-clock-parents = <0>, <0>, <0>;
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assigned-clock-rates = <589824000>,
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<270950400>,
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<393216000>;

‎arch/arm64/boot/dts/amlogic/meson-axg.dtsi‎

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<&clkc CLKID_FCLK_DIV2>;
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clock-names = "core", "clkin0", "clkin1";
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resets = <&reset RESET_SD_EMMC_B>;
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assigned-clocks = <&clkc CLKID_SD_EMMC_B_CLK0>;
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assigned-clock-rates = <24000000>;
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};
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sd_emmc_c: mmc@7000 {
@@ -1972,6 +1975,9 @@
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<&clkc CLKID_FCLK_DIV2>;
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clock-names = "core", "clkin0", "clkin1";
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resets = <&reset RESET_SD_EMMC_C>;
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assigned-clocks = <&clkc CLKID_SD_EMMC_C_CLK0>;
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assigned-clock-rates = <24000000>;
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};
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nfc: nand-controller@7800 {

‎arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi‎

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@@ -2431,6 +2431,9 @@
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<&clkc CLKID_FCLK_DIV2>;
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clock-names = "core", "clkin0", "clkin1";
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resets = <&reset RESET_SD_EMMC_A>;
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assigned-clocks = <&clkc CLKID_SD_EMMC_A_CLK0>;
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assigned-clock-rates = <24000000>;
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};
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sd_emmc_b: mmc@ffe05000 {
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<&clkc CLKID_FCLK_DIV2>;
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clock-names = "core", "clkin0", "clkin1";
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resets = <&reset RESET_SD_EMMC_B>;
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assigned-clocks = <&clkc CLKID_SD_EMMC_B_CLK0>;
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assigned-clock-rates = <24000000>;
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};
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sd_emmc_c: mmc@ffe07000 {
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<&clkc CLKID_FCLK_DIV2>;
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clock-names = "core", "clkin0", "clkin1";
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resets = <&reset RESET_SD_EMMC_C>;
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assigned-clocks = <&clkc CLKID_SD_EMMC_C_CLK0>;
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assigned-clock-rates = <24000000>;
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};
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usb: usb@ffe09000 {

‎arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts‎

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@@ -183,7 +183,6 @@
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assigned-clocks = <&clkc CLKID_MPLL2>,
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<&clkc CLKID_MPLL0>,
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<&clkc CLKID_MPLL1>;
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assigned-clock-parents = <0>, <0>, <0>;
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assigned-clock-rates = <294912000>,
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<270950400>,
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<393216000>;
@@ -265,26 +264,18 @@
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266265
&cpu0 {
267266
cpu-supply = <&vddcpu>;
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operating-points-v2 = <&cpu_opp_table>;
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clocks = <&clkc CLKID_CPU_CLK>;
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};
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272269
&cpu1 {
273270
cpu-supply = <&vddcpu>;
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operating-points-v2 = <&cpu_opp_table>;
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clocks = <&clkc CLKID_CPU_CLK>;
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};
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278273
&cpu2 {
279274
cpu-supply = <&vddcpu>;
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operating-points-v2 = <&cpu_opp_table>;
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clocks = <&clkc CLKID_CPU_CLK>;
282275
};
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284277
&cpu3 {
285278
cpu-supply = <&vddcpu>;
286-
operating-points-v2 = <&cpu_opp_table>;
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clocks = <&clkc CLKID_CPU_CLK>;
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};
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&ethmac {

‎arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts‎

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145145
assigned-clocks = <&clkc CLKID_MPLL2>,
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<&clkc CLKID_MPLL0>,
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<&clkc CLKID_MPLL1>;
148-
assigned-clock-parents = <0>, <0>, <0>;
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assigned-clock-rates = <294912000>,
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<270950400>,
151150
<393216000>;
@@ -218,26 +217,18 @@
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219218
&cpu0 {
220219
cpu-supply = <&vddcpu>;
221-
operating-points-v2 = <&cpu_opp_table>;
222-
clocks = <&clkc CLKID_CPU_CLK>;
223220
};
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225222
&cpu1 {
226223
cpu-supply = <&vddcpu>;
227-
operating-points-v2 = <&cpu_opp_table>;
228-
clocks = <&clkc CLKID_CPU_CLK>;
229224
};
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231226
&cpu2 {
232227
cpu-supply = <&vddcpu>;
233-
operating-points-v2 = <&cpu_opp_table>;
234-
clocks = <&clkc CLKID_CPU_CLK>;
235228
};
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237230
&cpu3 {
238231
cpu-supply = <&vddcpu>;
239-
operating-points-v2 = <&cpu_opp_table>;
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clocks = <&clkc CLKID_CPU_CLK>;
241232
};
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243234
&cvbs_vdac_port {

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