drm/amd/display: Isolate remaining FPU code in DCN32

Jasdeep Dhillon · alexdeucher · commit 3caab67db1f6 · 2023-04-26T22:48:52.000-04:00
[Why]
DCN32 resource contains code that uses FPU.

[How]
Moved code into DCN32 FPU

Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Jasdeep Dhillon &lt;jasdeep.dhillon@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
@@ -2876,3 +2876,9 @@ bool dcn32_find_vactive_pipe(struct dc *dc, const struct dc_state *context, uint
 	}
 	return vactive_found;
 }
+
+void dcn32_set_clock_limits(const struct _vcs_dpi_soc_bounding_box_st *soc_bb)
+{
+	dc_assert_fp_enabled();
+	dcn3_2_soc.clock_limits[0].dcfclk_mhz = 1200.0;
+}
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.h b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.h
@@ -80,4 +80,6 @@ void dcn32_assign_fpo_vactive_candidate(struct dc *dc, const struct dc_state *co
 
 bool dcn32_find_vactive_pipe(struct dc *dc, const struct dc_state *context, uint32_t vactive_margin_req);
 
+void dcn32_set_clock_limits(const struct _vcs_dpi_soc_bounding_box_st *soc_bb);
+
 #endif

Original file line number	Diff line number	Diff line change
`@@ -2876,3 +2876,9 @@ bool dcn32_find_vactive_pipe(struct dc dc, const struct dc_state context, uint`
`2876`	`2876`	`}`
`2877`	`2877`	`return vactive_found;`
`2878`	`2878`	`}`
	`2879`	`+`
	`2880`	`+void dcn32_set_clock_limits(const struct _vcs_dpi_soc_bounding_box_st *soc_bb)`
	`2881`	`+{`
	`2882`	`+ dc_assert_fp_enabled();`
	`2883`	`+ dcn3_2_soc.clock_limits[0].dcfclk_mhz = 1200.0;`
	`2884`	`+}`