x86/cpu: Add new Alderlake and Raptorlake CPU model numbers

aegl · suryasaimadhu · commit 3ccce9340326 · 2022-04-19T12:04:51.000+02:00
Intel is subdividing the mobile segment with additional models with the same codename. Using the Intel "N" and "P" suffices for these will be less confusing than trying to map to some different naming convention. Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/YlS7n7Xtso9BXZA2@agluck-desk3.sc.intel.com
diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
@@ -26,6 +26,7 @@
  *		_G	- parts with extra graphics on
  *		_X	- regular server parts
  *		_D	- micro server parts
+ *		_N,_P	- other mobile parts
  *
  *		Historical OPTDIFFs:
  *
@@ -107,8 +108,10 @@
 
 #define INTEL_FAM6_ALDERLAKE		0x97	/* Golden Cove / Gracemont */
 #define INTEL_FAM6_ALDERLAKE_L		0x9A	/* Golden Cove / Gracemont */
+#define INTEL_FAM6_ALDERLAKE_N		0xBE
 
 #define INTEL_FAM6_RAPTORLAKE		0xB7
+#define INTEL_FAM6_RAPTORLAKE_P		0xBA
 
 /* "Small Core" Processors (Atom) */
 

Original file line number	Diff line number	Diff line change
`@@ -26,6 +26,7 @@`
`26`	`26`	`* _G - parts with extra graphics on`
`27`	`27`	`* _X - regular server parts`
`28`	`28`	`* _D - micro server parts`
	`29`	`+ * _N,_P - other mobile parts`
`29`	`30`	`*`
`30`	`31`	`* Historical OPTDIFFs:`
`31`	`32`	`*`
`@@ -107,8 +108,10 @@`
`107`	`108`
`108`	`109`	`#define INTEL_FAM6_ALDERLAKE 0x97 /* Golden Cove / Gracemont */`
`109`	`110`	`#define INTEL_FAM6_ALDERLAKE_L 0x9A /* Golden Cove / Gracemont */`
	`111`	`+#define INTEL_FAM6_ALDERLAKE_N 0xBE`
`110`	`112`
`111`	`113`	`#define INTEL_FAM6_RAPTORLAKE 0xB7`
	`114`	`+#define INTEL_FAM6_RAPTORLAKE_P 0xBA`
`112`	`115`
`113`	`116`	`/* "Small Core" Processors (Atom) */`
`114`	`117`