11// SPDX-License-Identifier: GPL-2.0+
22/*
3- * rcar_du_drv.c -- R-Car Display Unit DRM driver
3+ * R-Car Display Unit DRM driver
44 *
55 * Copyright (C) 2013-2015 Renesas Electronics Corporation
66 *
@@ -55,6 +55,7 @@ static const struct rcar_du_device_info rzg1_du_r8a7743_info = {
5555 },
5656 },
5757 .num_lvds = 1 ,
58+ .num_rpf = 4 ,
5859};
5960
6061static const struct rcar_du_device_info rzg1_du_r8a7745_info = {
@@ -77,6 +78,7 @@ static const struct rcar_du_device_info rzg1_du_r8a7745_info = {
7778 .port = 1 ,
7879 },
7980 },
81+ .num_rpf = 4 ,
8082};
8183
8284static const struct rcar_du_device_info rzg1_du_r8a77470_info = {
@@ -104,6 +106,7 @@ static const struct rcar_du_device_info rzg1_du_r8a77470_info = {
104106 .port = 2 ,
105107 },
106108 },
109+ .num_rpf = 4 ,
107110};
108111
109112static const struct rcar_du_device_info rcar_du_r8a774a1_info = {
@@ -133,6 +136,7 @@ static const struct rcar_du_device_info rcar_du_r8a774a1_info = {
133136 },
134137 },
135138 .num_lvds = 1 ,
139+ .num_rpf = 5 ,
136140 .dpll_mask = BIT (1 ),
137141};
138142
@@ -163,6 +167,7 @@ static const struct rcar_du_device_info rcar_du_r8a774b1_info = {
163167 },
164168 },
165169 .num_lvds = 1 ,
170+ .num_rpf = 5 ,
166171 .dpll_mask = BIT (1 ),
167172};
168173
@@ -190,6 +195,7 @@ static const struct rcar_du_device_info rcar_du_r8a774c0_info = {
190195 },
191196 },
192197 .num_lvds = 2 ,
198+ .num_rpf = 4 ,
193199 .lvds_clk_mask = BIT (1 ) | BIT (0 ),
194200};
195201
@@ -220,6 +226,7 @@ static const struct rcar_du_device_info rcar_du_r8a774e1_info = {
220226 },
221227 },
222228 .num_lvds = 1 ,
229+ .num_rpf = 5 ,
223230 .dpll_mask = BIT (1 ),
224231};
225232
@@ -272,6 +279,7 @@ static const struct rcar_du_device_info rcar_du_r8a7790_info = {
272279 },
273280 },
274281 .num_lvds = 2 ,
282+ .num_rpf = 4 ,
275283};
276284
277285/* M2-W (r8a7791) and M2-N (r8a7793) are identical */
@@ -297,6 +305,7 @@ static const struct rcar_du_device_info rcar_du_r8a7791_info = {
297305 },
298306 },
299307 .num_lvds = 1 ,
308+ .num_rpf = 4 ,
300309};
301310
302311static const struct rcar_du_device_info rcar_du_r8a7792_info = {
@@ -317,6 +326,7 @@ static const struct rcar_du_device_info rcar_du_r8a7792_info = {
317326 .port = 1 ,
318327 },
319328 },
329+ .num_rpf = 4 ,
320330};
321331
322332static const struct rcar_du_device_info rcar_du_r8a7794_info = {
@@ -340,6 +350,7 @@ static const struct rcar_du_device_info rcar_du_r8a7794_info = {
340350 .port = 1 ,
341351 },
342352 },
353+ .num_rpf = 4 ,
343354};
344355
345356static const struct rcar_du_device_info rcar_du_r8a7795_info = {
@@ -373,6 +384,7 @@ static const struct rcar_du_device_info rcar_du_r8a7795_info = {
373384 },
374385 },
375386 .num_lvds = 1 ,
387+ .num_rpf = 5 ,
376388 .dpll_mask = BIT (2 ) | BIT (1 ),
377389};
378390
@@ -403,6 +415,7 @@ static const struct rcar_du_device_info rcar_du_r8a7796_info = {
403415 },
404416 },
405417 .num_lvds = 1 ,
418+ .num_rpf = 5 ,
406419 .dpll_mask = BIT (1 ),
407420};
408421
@@ -433,6 +446,7 @@ static const struct rcar_du_device_info rcar_du_r8a77965_info = {
433446 },
434447 },
435448 .num_lvds = 1 ,
449+ .num_rpf = 5 ,
436450 .dpll_mask = BIT (1 ),
437451};
438452
@@ -459,6 +473,7 @@ static const struct rcar_du_device_info rcar_du_r8a77970_info = {
459473 },
460474 },
461475 .num_lvds = 1 ,
476+ .num_rpf = 5 ,
462477};
463478
464479static const struct rcar_du_device_info rcar_du_r8a7799x_info = {
@@ -486,6 +501,7 @@ static const struct rcar_du_device_info rcar_du_r8a7799x_info = {
486501 },
487502 },
488503 .num_lvds = 2 ,
504+ .num_rpf = 5 ,
489505 .lvds_clk_mask = BIT (1 ) | BIT (0 ),
490506};
491507
@@ -505,6 +521,7 @@ static const struct rcar_du_device_info rcar_du_r8a779a0_info = {
505521 .port = 1 ,
506522 },
507523 },
524+ .num_rpf = 5 ,
508525 .dsi_clk_mask = BIT (1 ) | BIT (0 ),
509526};
510527
0 commit comments