drm/amdgpu: Reduce redundant gpu resets on nbio v7.4

YiPeng Chai · alexdeucher · commit 3d0ffc64188c · 2024-10-24T18:04:34.000-04:00
On nbio v7.4, ras controller interrupt and athub
interrupt are generated after injecting UE to PCIE,
but gpu reset only needs to be triggered once.

Signed-off-by: YiPeng Chai &lt;YiPeng.Chai@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
@@ -414,8 +414,7 @@ static void nbio_v7_4_handle_ras_controller_intr_no_bifring(struct amdgpu_device
 		/* ras_controller_int is dedicated for nbif ras error,
 		 * not the global interrupt for sync flood
 		 */
-		amdgpu_ras_set_fed(adev, true);
-		amdgpu_ras_reset_gpu(adev);
+		amdgpu_ras_global_ras_isr(adev);
 	}
 
 	amdgpu_ras_error_data_fini(&err_data);

Original file line number	Diff line number	Diff line change
`@@ -414,8 +414,7 @@ static void nbio_v7_4_handle_ras_controller_intr_no_bifring(struct amdgpu_device`
`414`	`414`	`/* ras_controller_int is dedicated for nbif ras error,`
`415`	`415`	`* not the global interrupt for sync flood`
`416`	`416`	`*/`
`417`		`- amdgpu_ras_set_fed(adev, true);`
`418`		`- amdgpu_ras_reset_gpu(adev);`
	`417`	`+ amdgpu_ras_global_ras_isr(adev);`
`419`	`418`	`}`
`420`	`419`
`421`	`420`	`amdgpu_ras_error_data_fini(&err_data);`