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Wolfram Sangkrzk
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memory: renesas-rpc-if: Fix PHYCNT.STRTIM setting
According to the datasheets, the Strobe Timing Adjustment bit (STRTIM) setting is different on R-Car SoCs, i.e. R-Car M3 ES1.* : STRTIM[2:0] is set to 0x6 other R-Car Gen3: STRTIM[2:0] is set to 0x7 other R-Car Gen4: STRTIM[3:0] is set to 0xf To fix this issue, a DT match data was added to specify the setting for special use cases. Signed-off-by: Cong Dang <cong.dang.xn@renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> [wsa: rebased, restructured, added Gen4 support] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230419130234.44321-1-wsa+renesas@sang-engineering.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Lines changed: 39 additions & 14 deletions

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drivers/memory/renesas-rpc-if.c

Lines changed: 39 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@
77
* Copyright (C) 2019-2020 Cogent Embedded, Inc.
88
*/
99

10+
#include <linux/bitops.h>
1011
#include <linux/clk.h>
1112
#include <linux/io.h>
1213
#include <linux/module.h>
@@ -163,6 +164,11 @@ static const struct regmap_access_table rpcif_volatile_table = {
163164
.n_yes_ranges = ARRAY_SIZE(rpcif_volatile_ranges),
164165
};
165166

167+
struct rpcif_info {
168+
enum rpcif_type type;
169+
u8 strtim;
170+
};
171+
166172
struct rpcif_priv {
167173
struct device *dev;
168174
void __iomem *base;
@@ -171,7 +177,7 @@ struct rpcif_priv {
171177
struct reset_control *rstc;
172178
struct platform_device *vdev;
173179
size_t size;
174-
enum rpcif_type type;
180+
const struct rpcif_info *info;
175181
enum rpcif_data_dir dir;
176182
u8 bus_size;
177183
u8 xfer_size;
@@ -186,6 +192,26 @@ struct rpcif_priv {
186192
u32 ddr; /* DRDRENR or SMDRENR */
187193
};
188194

195+
static const struct rpcif_info rpcif_info_r8a7796 = {
196+
.type = RPCIF_RCAR_GEN3,
197+
.strtim = 6,
198+
};
199+
200+
static const struct rpcif_info rpcif_info_gen3 = {
201+
.type = RPCIF_RCAR_GEN3,
202+
.strtim = 7,
203+
};
204+
205+
static const struct rpcif_info rpcif_info_rz_g2l = {
206+
.type = RPCIF_RZ_G2L,
207+
.strtim = 7,
208+
};
209+
210+
static const struct rpcif_info rpcif_info_gen4 = {
211+
.type = RPCIF_RCAR_GEN4,
212+
.strtim = 15,
213+
};
214+
189215
/*
190216
* Custom accessor functions to ensure SM[RW]DR[01] are always accessed with
191217
* proper width. Requires rpcif_priv.xfer_size to be correctly set before!
@@ -310,7 +336,7 @@ int rpcif_hw_init(struct device *dev, bool hyperflash)
310336
if (ret)
311337
return ret;
312338

313-
if (rpc->type == RPCIF_RZ_G2L) {
339+
if (rpc->info->type == RPCIF_RZ_G2L) {
314340
ret = reset_control_reset(rpc->rstc);
315341
if (ret)
316342
return ret;
@@ -324,12 +350,10 @@ int rpcif_hw_init(struct device *dev, bool hyperflash)
324350
/* DMA Transfer is not supported */
325351
regmap_update_bits(rpc->regmap, RPCIF_PHYCNT, RPCIF_PHYCNT_HS, 0);
326352

327-
if (rpc->type == RPCIF_RCAR_GEN3)
328-
regmap_update_bits(rpc->regmap, RPCIF_PHYCNT,
329-
RPCIF_PHYCNT_STRTIM(7), RPCIF_PHYCNT_STRTIM(7));
330-
else if (rpc->type == RPCIF_RCAR_GEN4)
331-
regmap_update_bits(rpc->regmap, RPCIF_PHYCNT,
332-
RPCIF_PHYCNT_STRTIM(15), RPCIF_PHYCNT_STRTIM(15));
353+
regmap_update_bits(rpc->regmap, RPCIF_PHYCNT,
354+
/* create mask with all affected bits set */
355+
RPCIF_PHYCNT_STRTIM(BIT(fls(rpc->info->strtim)) - 1),
356+
RPCIF_PHYCNT_STRTIM(rpc->info->strtim));
333357

334358
regmap_update_bits(rpc->regmap, RPCIF_PHYOFFSET1, RPCIF_PHYOFFSET1_DDRTMG(3),
335359
RPCIF_PHYOFFSET1_DDRTMG(3));
@@ -340,7 +364,7 @@ int rpcif_hw_init(struct device *dev, bool hyperflash)
340364
regmap_update_bits(rpc->regmap, RPCIF_PHYINT,
341365
RPCIF_PHYINT_WPVAL, 0);
342366

343-
if (rpc->type == RPCIF_RZ_G2L)
367+
if (rpc->info->type == RPCIF_RZ_G2L)
344368
regmap_update_bits(rpc->regmap, RPCIF_CMNCR,
345369
RPCIF_CMNCR_MOIIO(3) | RPCIF_CMNCR_IOFV(3) |
346370
RPCIF_CMNCR_BSZ(3),
@@ -729,9 +753,9 @@ static int rpcif_probe(struct platform_device *pdev)
729753
rpc->dirmap = devm_ioremap_resource(dev, res);
730754
if (IS_ERR(rpc->dirmap))
731755
return PTR_ERR(rpc->dirmap);
732-
rpc->size = resource_size(res);
733756

734-
rpc->type = (uintptr_t)of_device_get_match_data(dev);
757+
rpc->size = resource_size(res);
758+
rpc->info = of_device_get_match_data(dev);
735759
rpc->rstc = devm_reset_control_get_exclusive(dev, NULL);
736760
if (IS_ERR(rpc->rstc))
737761
return PTR_ERR(rpc->rstc);
@@ -764,9 +788,10 @@ static int rpcif_remove(struct platform_device *pdev)
764788
}
765789

766790
static const struct of_device_id rpcif_of_match[] = {
767-
{ .compatible = "renesas,rcar-gen3-rpc-if", .data = (void *)RPCIF_RCAR_GEN3 },
768-
{ .compatible = "renesas,rcar-gen4-rpc-if", .data = (void *)RPCIF_RCAR_GEN4 },
769-
{ .compatible = "renesas,rzg2l-rpc-if", .data = (void *)RPCIF_RZ_G2L },
791+
{ .compatible = "renesas,r8a7796-rpc-if", .data = &rpcif_info_r8a7796 },
792+
{ .compatible = "renesas,rcar-gen3-rpc-if", .data = &rpcif_info_gen3 },
793+
{ .compatible = "renesas,rcar-gen4-rpc-if", .data = &rpcif_info_gen4 },
794+
{ .compatible = "renesas,rzg2l-rpc-if", .data = &rpcif_info_rz_g2l },
770795
{},
771796
};
772797
MODULE_DEVICE_TABLE(of, rpcif_of_match);

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