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Merge tag 'stm32-dt-for-v6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.10, round 1 Highlights: ---------- - MPU: - STM32MP13: - Add and enable LTDC display (rocktech,rk043fn48h) on stm32mp135f-dk. - Add firewall bus based on ETZPC firewall controller. - Add PWR regulator support: Can be only used if the platform is set as "no-secure" (RCC_SECCFGR cleared) either use SCMI regulator. - STMP32MP15: - Add firewall bus based on ETZPC firewall controller. - Add heartbeat on stm32mp157c-ed1. - STM32MP25: - Add firewall bus based on RIFSC firewall controller. - Add clock support (RCC) based on SCMI clock protocol for root clocks. - Add all I2C instances and declare i2c2/i2c8 on stm32mp257f-ev1. - Add all SPI instances. and declare spi3/spi8 on stm32mp257f-ev1. * tag 'stm32-dt-for-v6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (21 commits) arm64: dts: st: correct masks for GIC PPI interrupts on stm32mp25 arm64: dts: st: add spi3 / spi8 properties on stm32mp257f-ev1 arm64: dts: st: add spi3/spi8 pins for stm32mp25 arm64: dts: st: add all 8 spi nodes on stm32mp251 arm64: dts: st: add i2c2 / i2c8 properties on stm32mp257f-ev1 arm64: dts: st: add i2c2/i2c8 pins for stm32mp25 arm64: dts: st: add all 8 i2c nodes on stm32mp251 arm64: dts: st: add rcc support for STM32MP25 ARM: dts: stm32: enable display support on stm32mp135f-dk board ARM: dts: stm32: add LTDC pinctrl on STM32MP13x SoC family ARM: dts: stm32: add LTDC support for STM32MP13x SoC family dt-bindings: display: simple: allow panel-common properties ARM: dts: stm32: add PWR regulators support on stm32mp131 media: dt-bindings: add access-controllers to STM32MP25 video codecs ARM: dts: stm32: add heartbeat led for stm32mp157c-ed1 ARM: dts: stm32: move can3 node from stm32f746 to stm32f769 ARM: dts: stm32: put ETZPC as an access controller for STM32MP13x boards ARM: dts: stm32: add ETZPC as a system bus for STM32MP13x boards ARM: dts: stm32: put ETZPC as an access controller for STM32MP15x boards ARM: dts: stm32: add ETZPC as a system bus for STM32MP15x boards ... Link: https://lore.kernel.org/r/2040767c-413e-4447-b354-c44999930e4c@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 parents 405a7cd + 36cf0d8 commit 3f35669

20 files changed

Lines changed: 2683 additions & 2026 deletions

‎Documentation/devicetree/bindings/display/panel/panel-simple.yaml‎

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@@ -348,15 +348,6 @@ properties:
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# Yes Optoelectronics YTC700TLAG-05-201C 7" TFT LCD panel
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- yes-optoelectronics,ytc700tlag-05-201c
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backlight: true
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ddc-i2c-bus: true
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enable-gpios: true
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port: true
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power-supply: true
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no-hpd: true
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hpd-gpios: true
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data-mapping: true
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if:
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not:
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properties:
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properties:
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data-mapping: false
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additionalProperties: false
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unevaluatedProperties: false
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required:
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- compatible

‎Documentation/devicetree/bindings/media/st,stm32mp25-video-codec.yaml‎

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@@ -30,6 +30,10 @@ properties:
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clocks:
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maxItems: 1
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access-controllers:
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minItems: 1
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maxItems: 2
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required:
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- compatible
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- reg

‎arch/arm/boot/dts/st/stm32f746.dtsi‎

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status = "disabled";
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};
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can3: can@40003400 {
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compatible = "st,stm32f4-bxcan";
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reg = <0x40003400 0x200>;
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interrupts = <104>, <105>, <106>, <107>;
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interrupt-names = "tx", "rx0", "rx1", "sce";
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resets = <&rcc STM32F7_APB1_RESET(CAN3)>;
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clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>;
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st,gcan = <&gcan3>;
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status = "disabled";
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};
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gcan3: gcan@40003600 {
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compatible = "st,stm32f4-gcan", "syscon";
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reg = <0x40003600 0x200>;
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clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>;
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};
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spi2: spi@40003800 {
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#address-cells = <1>;
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#size-cells = <0>;

‎arch/arm/boot/dts/st/stm32f769.dtsi‎

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/ {
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soc {
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can3: can@40003400 {
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compatible = "st,stm32f4-bxcan";
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reg = <0x40003400 0x200>;
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interrupts = <104>, <105>, <106>, <107>;
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interrupt-names = "tx", "rx0", "rx1", "sce";
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resets = <&rcc STM32F7_APB1_RESET(CAN3)>;
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clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>;
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st,gcan = <&gcan3>;
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status = "disabled";
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};
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gcan3: gcan@40003600 {
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compatible = "st,stm32f4-gcan", "syscon";
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reg = <0x40003600 0x200>;
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clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>;
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};
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dsi: dsi@40016c00 {
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compatible = "st,stm32-dsi";
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reg = <0x40016c00 0x800>;

‎arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi‎

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};
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};
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ltdc_pins_a: ltdc-0 {
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pins {
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pinmux = <STM32_PINMUX('D', 9, AF13)>, /* LCD_CLK */
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<STM32_PINMUX('C', 6, AF14)>, /* LCD_HSYNC */
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<STM32_PINMUX('G', 4, AF11)>, /* LCD_VSYNC */
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<STM32_PINMUX('H', 9, AF11)>, /* LCD_DE */
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<STM32_PINMUX('G', 7, AF14)>, /* LCD_R2 */
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<STM32_PINMUX('B', 12, AF13)>, /* LCD_R3 */
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<STM32_PINMUX('D', 14, AF14)>, /* LCD_R4 */
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<STM32_PINMUX('E', 7, AF14)>, /* LCD_R5 */
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<STM32_PINMUX('E', 13, AF14)>, /* LCD_R6 */
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<STM32_PINMUX('E', 9, AF14)>, /* LCD_R7 */
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<STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
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<STM32_PINMUX('F', 3, AF14)>, /* LCD_G3 */
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<STM32_PINMUX('D', 5, AF14)>, /* LCD_G4 */
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<STM32_PINMUX('G', 0, AF14)>, /* LCD_G5 */
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<STM32_PINMUX('C', 7, AF14)>, /* LCD_G6 */
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<STM32_PINMUX('A', 15, AF11)>, /* LCD_G7 */
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<STM32_PINMUX('D', 10, AF14)>, /* LCD_B2 */
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<STM32_PINMUX('F', 2, AF14)>, /* LCD_B3 */
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<STM32_PINMUX('H', 14, AF11)>, /* LCD_B4 */
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<STM32_PINMUX('E', 0, AF14)>, /* LCD_B5 */
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<STM32_PINMUX('B', 6, AF7)>, /* LCD_B6 */
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<STM32_PINMUX('F', 1, AF13)>; /* LCD_B7 */
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bias-disable;
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drive-push-pull;
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slew-rate = <0>;
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};
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};
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ltdc_sleep_pins_a: ltdc-sleep-0 {
81+
pins {
82+
pinmux = <STM32_PINMUX('D', 9, ANALOG)>, /* LCD_CLK */
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<STM32_PINMUX('C', 6, ANALOG)>, /* LCD_HSYNC */
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<STM32_PINMUX('G', 4, ANALOG)>, /* LCD_VSYNC */
85+
<STM32_PINMUX('H', 9, ANALOG)>, /* LCD_DE */
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<STM32_PINMUX('G', 7, ANALOG)>, /* LCD_R2 */
87+
<STM32_PINMUX('B', 12, ANALOG)>, /* LCD_R3 */
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<STM32_PINMUX('D', 14, ANALOG)>, /* LCD_R4 */
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<STM32_PINMUX('E', 7, ANALOG)>, /* LCD_R5 */
90+
<STM32_PINMUX('E', 13, ANALOG)>, /* LCD_R6 */
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<STM32_PINMUX('E', 9, ANALOG)>, /* LCD_R7 */
92+
<STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
93+
<STM32_PINMUX('F', 3, ANALOG)>, /* LCD_G3 */
94+
<STM32_PINMUX('D', 5, ANALOG)>, /* LCD_G4 */
95+
<STM32_PINMUX('G', 0, ANALOG)>, /* LCD_G5 */
96+
<STM32_PINMUX('C', 7, ANALOG)>, /* LCD_G6 */
97+
<STM32_PINMUX('A', 15, ANALOG)>, /* LCD_G7 */
98+
<STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B2 */
99+
<STM32_PINMUX('F', 2, ANALOG)>, /* LCD_B3 */
100+
<STM32_PINMUX('H', 14, ANALOG)>, /* LCD_B4 */
101+
<STM32_PINMUX('E', 0, ANALOG)>, /* LCD_B5 */
102+
<STM32_PINMUX('B', 6, ANALOG)>, /* LCD_B6 */
103+
<STM32_PINMUX('F', 1, ANALOG)>; /* LCD_B7 */
104+
};
105+
};
106+
50107
mcp23017_pins_a: mcp23017-0 {
51108
pins {
52109
pinmux = <STM32_PINMUX('G', 12, GPIO)>;

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