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Merge tag 'char-misc-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull Char/Misc updates from Greg KH: "Here is the big set of char/misc and other driver subsystem updates for 6.5-rc1. Lots of different, tiny, stuff in here, from a range of smaller driver subsystems, including pulls from some substems directly: - IIO driver updates and additions - W1 driver updates and fixes (and a new maintainer!) - FPGA driver updates and fixes - Counter driver updates - Extcon driver updates - Interconnect driver updates - Coresight driver updates - mfd tree tag merge needed for other updates on top of that, lots of small driver updates as patches, including: - static const updates for class structures - nvmem driver updates - pcmcia driver fix - lots of other small driver updates and fixes All of these have been in linux-next for a while with no reported problems" * tag 'char-misc-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (243 commits) bsr: fix build problem with bsr_class static cleanup comedi: make all 'class' structures const char: xillybus: make xillybus_class a static const structure xilinx_hwicap: make icap_class a static const structure virtio_console: make port class a static const structure ppdev: make ppdev_class a static const structure char: misc: make misc_class a static const structure /dev/mem: make mem_class a static const structure char: lp: make lp_class a static const structure dsp56k: make dsp56k_class a static const structure bsr: make bsr_class a static const structure oradax: make 'cl' a static const structure hwtracing: hisi_ptt: Fix potential sleep in atomic context hwtracing: hisi_ptt: Advertise PERF_PMU_CAP_NO_EXCLUDE for PTT PMU hwtracing: hisi_ptt: Export available filters through sysfs hwtracing: hisi_ptt: Add support for dynamically updating the filter list hwtracing: hisi_ptt: Factor out filter allocation and release operation samples: pfsm: add CC_CAN_LINK dependency misc: fastrpc: check return value of devm_kasprintf() coresight: dummy: Update type of mode parameter in dummy_{sink,source}_enable() ...
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‎Documentation/ABI/testing/sysfs-bus-counter‎

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@@ -90,6 +90,60 @@ Description:
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counter does not freeze at the boundary points, but
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counts continuously throughout.
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interrupt on terminal count:
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The output signal is initially low, and will remain low
95+
until the counter reaches zero. The output signal then
96+
goes high and remains high until a new preset value is
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set.
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hardware retriggerable one-shot:
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The output signal is initially high. The output signal
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will go low by a trigger input signal, and will remain
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low until the counter reaches zero. The output will then
103+
go high and remain high until the next trigger. A
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trigger results in loading the counter to the preset
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value and setting the output signal low, thus starting
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the one-shot pulse.
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rate generator:
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The output signal is initially high. When the counter
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has decremented to 1, the output signal goes low for one
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clock pulse. The output signal then goes high again, the
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counter is reloaded to the preset value, and the process
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repeats in a periodic manner as such.
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square wave mode:
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The output signal is initially high.
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If the initial count is even, the counter is decremented
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by two on succeeding clock pulses. When the count
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expires, the output signal changes value and the
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counter is reloaded to the preset value. The process
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repeats in periodic manner as such.
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If the initial count is odd, the initial count minus one
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(an even number) is loaded and then is decremented by
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two on succeeding clock pulses. One clock pulse after
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the count expires, the output signal goes low and the
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counter is reloaded to the preset value minus one.
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Succeeding clock pulses decrement the count by two. When
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the count expires, the output goes high again and the
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counter is reloaded to the preset value minus one. The
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process repeats in a periodic manner as such.
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software triggered strobe:
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The output signal is initially high. When the count
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expires, the output will go low for one clock pulse and
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then go high again. The counting sequence is "triggered"
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by setting the preset value.
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hardware triggered strobe:
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The output signal is initially high. Counting is started
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by a trigger input signal. When the count expires, the
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output signal will go low for one clock pulse and then
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go high again. A trigger results in loading the counter
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to the preset value.
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What: /sys/bus/counter/devices/counterX/countY/count_mode_available
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What: /sys/bus/counter/devices/counterX/countY/error_noise_available
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What: /sys/bus/counter/devices/counterX/countY/function_available

‎Documentation/ABI/testing/sysfs-devices-hisi_ptt‎

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@@ -59,3 +59,55 @@ Description: (RW) Control the allocated buffer watermark of outbound packets.
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The available tune data is [0, 1, 2]. Writing a negative value
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will return an error, and out of range values will be converted
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to 2. The value indicates a probable level of the event.
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What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/root_port_filters
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Date: May 2023
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KernelVersion: 6.5
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Description: This directory contains the files providing the PCIe Root Port filters
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information used for PTT trace. Each file is named after the supported
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Root Port device name <domain>:<bus>:<device>.<function>.
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See the description of the "filter" in Documentation/trace/hisi-ptt.rst
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for more information.
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What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/root_port_filters/multiselect
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Date: May 2023
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KernelVersion: 6.5
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Description: (Read) Indicates if this kind of filter can be selected at the same
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time as others filters, or must be used on it's own. 1 indicates
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the former case and 0 indicates the latter.
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What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/root_port_filters/<bdf>
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Date: May 2023
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KernelVersion: 6.5
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Description: (Read) Indicates the filter value of this Root Port filter, which
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can be used to control the TLP headers to trace by the PTT trace.
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What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/requester_filters
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Date: May 2023
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KernelVersion: 6.5
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Description: This directory contains the files providing the PCIe Requester filters
94+
information used for PTT trace. Each file is named after the supported
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Endpoint device name <domain>:<bus>:<device>.<function>.
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See the description of the "filter" in Documentation/trace/hisi-ptt.rst
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for more information.
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What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/requester_filters/multiselect
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Date: May 2023
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KernelVersion: 6.5
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Description: (Read) Indicates if this kind of filter can be selected at the same
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time as others filters, or must be used on it's own. 1 indicates
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the former case and 0 indicates the latter.
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What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/requester_filters/<bdf>
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Date: May 2023
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KernelVersion: 6.5
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Description: (Read) Indicates the filter value of this Requester filter, which
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can be used to control the TLP headers to trace by the PTT trace.

‎Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml‎

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# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/arm/arm,coresight-dummy-sink.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+
title: ARM Coresight Dummy sink component
8+
9+
description: |
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CoreSight components are compliant with the ARM CoreSight architecture
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specification and can be connected in various topologies to suit a particular
12+
SoCs tracing needs. These trace components can generally be classified as
13+
sinks, links and sources. Trace data produced by one or more sources flows
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through the intermediate links connecting the source to the currently selected
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sink.
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17+
The Coresight dummy sink component is for the specific coresight sink devices
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kernel don't have permission to access or configure, e.g., CoreSight EUD on
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Qualcomm platforms. It is a mini-USB hub implemented to support the USB-based
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debug and trace capabilities. For this device, a dummy driver is needed to
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register it as Coresight sink device in kernel side, so that path can be
22+
created in the driver. Then the trace flow would be transferred to EUD via
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coresight link of AP processor. It provides Coresight API for operations on
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dummy source devices, such as enabling and disabling them. It also provides
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the Coresight dummy source paths for debugging.
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27+
The primary use case of the coresight dummy sink is to build path in kernel
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side for dummy sink component.
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maintainers:
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- Mike Leach <mike.leach@linaro.org>
32+
- Suzuki K Poulose <suzuki.poulose@arm.com>
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- James Clark <james.clark@arm.com>
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- Mao Jinlong <quic_jinlmao@quicinc.com>
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- Hao Zhang <quic_hazha@quicinc.com>
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properties:
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compatible:
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enum:
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- arm,coresight-dummy-sink
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in-ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port:
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description: Input connection from the Coresight Trace bus to
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dummy sink, such as Embedded USB debugger(EUD).
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$ref: /schemas/graph.yaml#/properties/port
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required:
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- compatible
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- in-ports
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additionalProperties: false
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examples:
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# Minimum dummy sink definition. Dummy sink connect to coresight replicator.
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- |
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sink {
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compatible = "arm,coresight-dummy-sink";
63+
64+
in-ports {
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port {
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eud_in_replicator_swao: endpoint {
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remote-endpoint = <&replicator_swao_out_eud>;
68+
};
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};
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};
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};
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...

‎Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml‎

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# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/arm/arm,coresight-dummy-source.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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7+
title: ARM Coresight Dummy source component
8+
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description: |
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CoreSight components are compliant with the ARM CoreSight architecture
11+
specification and can be connected in various topologies to suit a particular
12+
SoCs tracing needs. These trace components can generally be classified as
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sinks, links and sources. Trace data produced by one or more sources flows
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through the intermediate links connecting the source to the currently selected
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sink.
16+
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The Coresight dummy source component is for the specific coresight source
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devices kernel don't have permission to access or configure. For some SOCs,
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there would be Coresight source trace components on sub-processor which
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are conneted to AP processor via debug bus. For these devices, a dummy driver
21+
is needed to register them as Coresight source devices, so that paths can be
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created in the driver. It provides Coresight API for operations on dummy
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source devices, such as enabling and disabling them. It also provides the
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Coresight dummy source paths for debugging.
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The primary use case of the coresight dummy source is to build path in kernel
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side for dummy source component.
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maintainers:
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- Mike Leach <mike.leach@linaro.org>
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- Suzuki K Poulose <suzuki.poulose@arm.com>
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- James Clark <james.clark@arm.com>
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- Mao Jinlong <quic_jinlmao@quicinc.com>
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- Hao Zhang <quic_hazha@quicinc.com>
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properties:
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compatible:
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enum:
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- arm,coresight-dummy-source
40+
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out-ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port:
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description: Output connection from the source to Coresight
47+
Trace bus.
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$ref: /schemas/graph.yaml#/properties/port
49+
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required:
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- compatible
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- out-ports
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additionalProperties: false
55+
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examples:
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# Minimum dummy source definition. Dummy source connect to coresight funnel.
58+
- |
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source {
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compatible = "arm,coresight-dummy-source";
61+
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out-ports {
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port {
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dummy_riscv_out_funnel_swao: endpoint {
65+
remote-endpoint = <&funnel_swao_in_dummy_riscv>;
66+
};
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};
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};
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};
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...

‎Documentation/devicetree/bindings/extcon/qcom,pm8941-misc.yaml‎

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@@ -27,10 +27,14 @@ properties:
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interrupt-names:
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minItems: 1
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items:
31-
- const: usb_id
32-
- const: usb_vbus
33-
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anyOf:
31+
- items:
32+
- const: usb_id
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- const: usb_vbus
34+
- items:
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- const: usb_id
36+
- items:
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- const: usb_vbus
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required:
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- compatible
3640
- reg
@@ -49,7 +53,7 @@ examples:
4953
interrupt-controller;
5054
#interrupt-cells = <4>;
5155
52-
usb_id: misc@900 {
56+
usb_id: usb-detect@900 {
5357
compatible = "qcom,pm8941-misc";
5458
reg = <0x900>;
5559
interrupts = <0x0 0x9 0 IRQ_TYPE_EDGE_BOTH>;

‎Documentation/devicetree/bindings/extcon/wlf,arizona.yaml‎

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@@ -23,7 +23,7 @@ properties:
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headphone detect mode to HPDETL, ARIZONA_ACCDET_MODE_HPR/2 sets it
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to HPDETR. If this node is not included or if the value is unknown,
2525
then headphone detection mode is set to HPDETL.
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$ref: "/schemas/types.yaml#/definitions/uint32"
26+
$ref: /schemas/types.yaml#/definitions/uint32
2727
minimum: 1
2828
maximum: 2
2929

@@ -51,7 +51,7 @@ properties:
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description:
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Additional software microphone detection debounce specified in
5353
milliseconds.
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$ref: "/schemas/types.yaml#/definitions/uint32"
54+
$ref: /schemas/types.yaml#/definitions/uint32
5555

5656
wlf,micd-pol-gpio:
5757
description:
@@ -63,23 +63,23 @@ properties:
6363
description:
6464
Time allowed for MICBIAS to startup prior to performing microphone
6565
detection, specified as per the ARIZONA_MICD_TIME_XXX defines.
66-
$ref: "/schemas/types.yaml#/definitions/uint32"
66+
$ref: /schemas/types.yaml#/definitions/uint32
6767
minimum: 0
6868
maximum: 12
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wlf,micd-rate:
7171
description:
7272
Delay between successive microphone detection measurements, specified
7373
as per the ARIZONA_MICD_TIME_XXX defines.
74-
$ref: "/schemas/types.yaml#/definitions/uint32"
74+
$ref: /schemas/types.yaml#/definitions/uint32
7575
minimum: 0
7676
maximum: 12
7777

7878
wlf,micd-dbtime:
7979
description:
8080
Microphone detection hardware debounces specified as the number of
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measurements to take.
82-
$ref: "/schemas/types.yaml#/definitions/uint32"
82+
$ref: /schemas/types.yaml#/definitions/uint32
8383
enum: [2, 4]
8484

8585
wlf,micd-timeout-ms:
@@ -97,7 +97,7 @@ properties:
9797
CTIA / OMTP headsets), the field can be of variable length but
9898
should always be a multiple of 3 cells long, each three cell group
9999
represents one polarity configuration.
100-
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
100+
$ref: /schemas/types.yaml#/definitions/uint32-matrix
101101
items:
102102
items:
103103
- description:
@@ -119,7 +119,7 @@ properties:
119119
description:
120120
Settings for the general purpose switch, set as one of the
121121
ARIZONA_GPSW_XXX defines.
122-
$ref: "/schemas/types.yaml#/definitions/uint32"
122+
$ref: /schemas/types.yaml#/definitions/uint32
123123
minimum: 0
124124
maximum: 3
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‎Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml‎

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4747
avdd-supply:
4848
description: AVdd voltage supply
4949

50+
vref-supply:
51+
description: VRef voltage supply
52+
5053
adi,rejection-60-Hz-enable:
5154
description: |
5255
This bit enables a notch at 60 Hz when the first notch of the sinc
@@ -89,6 +92,7 @@ required:
8992
- interrupts
9093
- dvdd-supply
9194
- avdd-supply
95+
- vref-supply
9296
- spi-cpol
9397
- spi-cpha
9498

@@ -115,6 +119,7 @@ examples:
115119
interrupt-parent = <&gpio>;
116120
dvdd-supply = <&dvdd>;
117121
avdd-supply = <&avdd>;
122+
vref-supply = <&vref>;
118123
119124
adi,refin2-pins-enable;
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adi,rejection-60-Hz-enable;

‎Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml‎

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@@ -26,6 +26,7 @@ properties:
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- mediatek,mt2712-auxadc
2727
- mediatek,mt6765-auxadc
2828
- mediatek,mt7622-auxadc
29+
- mediatek,mt7986-auxadc
2930
- mediatek,mt8173-auxadc
3031
- items:
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- enum:

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