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Ryceancurryvinodkoul
Ryceancurry
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vinodkoul
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phy: usb: suppress OC condition for 7439b2
We hit a false positive OC for 7439b2 in DRD/device mode for the second port. So disable the OC check for this use case. Add capability to suppress OC condition for specific ports. Signed-off-by: Justin Chen <justin.chen@broadcom.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://lore.kernel.org/r/1686859578-45242-3-git-send-email-justin.chen@broadcom.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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‎drivers/phy/broadcom/phy-brcm-usb-init.c‎

Lines changed: 34 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,11 @@
3535
#define USB_CTRL_SETUP_STRAP_IPP_SEL_MASK BIT(25) /* option */
3636
#define USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK BIT(26) /* option */
3737
#define USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK BIT(27) /* opt */
38+
#define USB_CTRL_SETUP_OC_DISABLE_PORT0_MASK BIT(28)
39+
#define USB_CTRL_SETUP_OC_DISABLE_PORT1_MASK BIT(29)
40+
#define USB_CTRL_SETUP_OC_DISABLE_MASK GENMASK(29, 28) /* option */
41+
#define USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK BIT(30)
42+
#define USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK BIT(31)
3843
#define USB_CTRL_SETUP_OC3_DISABLE_MASK GENMASK(31, 30) /* option */
3944
#define USB_CTRL_PLL_CTL 0x04
4045
#define USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_MASK BIT(27)
@@ -114,6 +119,8 @@ enum {
114119
USB_CTRL_SETUP_SCB2_EN_SELECTOR,
115120
USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR,
116121
USB_CTRL_SETUP_STRAP_IPP_SEL_SELECTOR,
122+
USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR,
123+
USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR,
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USB_CTRL_SETUP_OC3_DISABLE_SELECTOR,
118125
USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_SELECTOR,
119126
USB_CTRL_USB_PM_BDC_SOFT_RESETB_SELECTOR,
@@ -190,6 +197,8 @@ usb_reg_bits_map_table[BRCM_FAMILY_COUNT][USB_CTRL_SELECTOR_COUNT] = {
190197
USB_CTRL_SETUP_SCB2_EN_MASK,
191198
USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
192199
USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
200+
USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
201+
USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
193202
USB_CTRL_SETUP_OC3_DISABLE_MASK,
194203
0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
195204
0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
@@ -232,6 +241,8 @@ usb_reg_bits_map_table[BRCM_FAMILY_COUNT][USB_CTRL_SELECTOR_COUNT] = {
232241
USB_CTRL_SETUP_SCB2_EN_MASK,
233242
USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
234243
0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */
244+
USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
245+
USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
235246
USB_CTRL_SETUP_OC3_DISABLE_MASK,
236247
USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK,
237248
0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
@@ -253,6 +264,8 @@ usb_reg_bits_map_table[BRCM_FAMILY_COUNT][USB_CTRL_SELECTOR_COUNT] = {
253264
0, /* USB_CTRL_SETUP_SCB2_EN_MASK */
254265
USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
255266
USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
267+
USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
268+
USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
256269
USB_CTRL_SETUP_OC3_DISABLE_MASK,
257270
0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
258271
USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK,
@@ -274,6 +287,8 @@ usb_reg_bits_map_table[BRCM_FAMILY_COUNT][USB_CTRL_SELECTOR_COUNT] = {
274287
USB_CTRL_SETUP_SCB2_EN_MASK,
275288
USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
276289
0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */
290+
USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
291+
USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
277292
USB_CTRL_SETUP_OC3_DISABLE_MASK,
278293
USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK,
279294
0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
@@ -295,6 +310,8 @@ usb_reg_bits_map_table[BRCM_FAMILY_COUNT][USB_CTRL_SELECTOR_COUNT] = {
295310
USB_CTRL_SETUP_SCB2_EN_MASK,
296311
USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
297312
0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */
313+
USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
314+
USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
298315
USB_CTRL_SETUP_OC3_DISABLE_MASK,
299316
0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
300317
0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
@@ -316,6 +333,8 @@ usb_reg_bits_map_table[BRCM_FAMILY_COUNT][USB_CTRL_SELECTOR_COUNT] = {
316333
USB_CTRL_SETUP_SCB2_EN_MASK,
317334
USB_CTRL_SETUP_SS_EHCI64BIT_EN_VAR_MASK,
318335
0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */
336+
0, /* USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK */
337+
0, /* USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK */
319338
0, /* USB_CTRL_SETUP_OC3_DISABLE_MASK */
320339
USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK,
321340
0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
@@ -337,6 +356,8 @@ usb_reg_bits_map_table[BRCM_FAMILY_COUNT][USB_CTRL_SELECTOR_COUNT] = {
337356
USB_CTRL_SETUP_SCB2_EN_MASK,
338357
USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
339358
USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
359+
USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
360+
USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
340361
USB_CTRL_SETUP_OC3_DISABLE_MASK,
341362
0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
342363
USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK,
@@ -358,6 +379,8 @@ usb_reg_bits_map_table[BRCM_FAMILY_COUNT][USB_CTRL_SELECTOR_COUNT] = {
358379
USB_CTRL_SETUP_SCB2_EN_MASK,
359380
USB_CTRL_SETUP_SS_EHCI64BIT_EN_VAR_MASK,
360381
0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */
382+
USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
383+
USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
361384
USB_CTRL_SETUP_OC3_DISABLE_MASK,
362385
USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK,
363386
0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
@@ -379,6 +402,8 @@ usb_reg_bits_map_table[BRCM_FAMILY_COUNT][USB_CTRL_SELECTOR_COUNT] = {
379402
0, /* USB_CTRL_SETUP_SCB2_EN_MASK */
380403
USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK,
381404
USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
405+
USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
406+
USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
382407
USB_CTRL_SETUP_OC3_DISABLE_MASK,
383408
0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
384409
USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK,
@@ -400,6 +425,8 @@ usb_reg_bits_map_table[BRCM_FAMILY_COUNT][USB_CTRL_SELECTOR_COUNT] = {
400425
0, /* USB_CTRL_SETUP_SCB2_EN_MASK */
401426
0, /*USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK */
402427
USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
428+
USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK,
429+
USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK,
403430
USB_CTRL_SETUP_OC3_DISABLE_MASK,
404431
0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
405432
USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK,
@@ -872,6 +899,13 @@ static void usb_init_common(struct brcm_usb_init_params *params)
872899

873900
brcmusb_memc_fix(params);
874901

902+
/* Workaround for false positive OC for 7439b2 in DRD/Device mode */
903+
if ((params->family_id == 0x74390012) &&
904+
(params->supported_port_modes != USB_CTLR_MODE_HOST)) {
905+
USB_CTRL_SET(ctrl, SETUP, OC_DISABLE_PORT1);
906+
USB_CTRL_SET_FAMILY(params, SETUP, OC3_DISABLE_PORT1);
907+
}
908+
875909
if (USB_CTRL_MASK_FAMILY(params, USB_DEVICE_CTL1, PORT_MODE)) {
876910
reg = brcm_usb_readl(USB_CTRL_REG(ctrl, USB_DEVICE_CTL1));
877911
reg &= ~USB_CTRL_MASK_FAMILY(params, USB_DEVICE_CTL1,

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