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airliedairlied
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Merge tag 'amd-drm-fixes-6.19-2025-12-17' of https://gitlab.freedesktop.org/agd5f/linux into drm-fixes
amd-drm-fixes-6.19-2025-12-17: amdgpu: - Fix no_console_suspend handling - DCN 3.5.x seamless boot fixes - DP audio fix - Fix race in GPU recovery - SMU 14 OD fix amdkfd: - Event fix Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patch.msgid.link/20251217171821.2033671-1-alexander.deucher@amd.com
2 parents 8f0b4cc + 969faea commit 46eb784

8 files changed

Lines changed: 62 additions & 21 deletions

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‎drivers/gpu/drm/amd/amdgpu/amdgpu_device.c‎

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -6613,6 +6613,8 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
66136613
struct amdgpu_hive_info *hive = NULL;
66146614
int r = 0;
66156615
bool need_emergency_restart = false;
6616+
/* save the pasid here as the job may be freed before the end of the reset */
6617+
int pasid = job ? job->pasid : -EINVAL;
66166618

66176619
/*
66186620
* If it reaches here because of hang/timeout and a RAS error is
@@ -6713,8 +6715,12 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
67136715
if (!r) {
67146716
struct amdgpu_task_info *ti = NULL;
67156717

6716-
if (job)
6717-
ti = amdgpu_vm_get_task_info_pasid(adev, job->pasid);
6718+
/*
6719+
* The job may already be freed at this point via the sched tdr workqueue so
6720+
* use the cached pasid.
6721+
*/
6722+
if (pasid >= 0)
6723+
ti = amdgpu_vm_get_task_info_pasid(adev, pasid);
67186724

67196725
drm_dev_wedged_event(adev_to_drm(adev), DRM_WEDGE_RECOVERY_NONE,
67206726
ti ? &ti->task : NULL);

‎drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,7 @@
3333
#include <drm/drm_vblank.h>
3434

3535
#include <linux/cc_platform.h>
36+
#include <linux/console.h>
3637
#include <linux/dynamic_debug.h>
3738
#include <linux/module.h>
3839
#include <linux/mmu_notifier.h>
@@ -2704,7 +2705,9 @@ static int amdgpu_pmops_thaw(struct device *dev)
27042705
struct drm_device *drm_dev = dev_get_drvdata(dev);
27052706

27062707
/* do not resume device if it's normal hibernation */
2707-
if (!pm_hibernate_is_recovering() && !pm_hibernation_mode_is_suspend())
2708+
if (console_suspend_enabled &&
2709+
!pm_hibernate_is_recovering() &&
2710+
!pm_hibernation_mode_is_suspend())
27082711
return 0;
27092712

27102713
return amdgpu_device_resume(drm_dev, true);

‎drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -312,7 +312,7 @@ void kfd_smi_event_queue_restore(struct kfd_node *node, pid_t pid)
312312
{
313313
kfd_smi_event_add(pid, node, KFD_SMI_EVENT_QUEUE_RESTORE,
314314
KFD_EVENT_FMT_QUEUE_RESTORE(ktime_get_boottime_ns(), pid,
315-
node->id, 0));
315+
node->id, '0'));
316316
}
317317

318318
void kfd_smi_event_queue_restore_rescheduled(struct mm_struct *mm)

‎drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1118,13 +1118,13 @@ void dce110_enable_audio_stream(struct pipe_ctx *pipe_ctx)
11181118
if (dc->current_state->res_ctx.pipe_ctx[i].stream_res.audio != NULL)
11191119
num_audio++;
11201120
}
1121+
if (num_audio >= 1 && clk_mgr->funcs->enable_pme_wa) {
1122+
/*wake AZ from D3 first before access az endpoint*/
1123+
clk_mgr->funcs->enable_pme_wa(clk_mgr);
1124+
}
11211125

11221126
pipe_ctx->stream_res.audio->funcs->az_enable(pipe_ctx->stream_res.audio);
11231127

1124-
if (num_audio >= 1 && clk_mgr->funcs->enable_pme_wa)
1125-
/*this is the first audio. apply the PME w/a in order to wake AZ from D3*/
1126-
clk_mgr->funcs->enable_pme_wa(clk_mgr);
1127-
11281128
link_hwss->enable_audio_packet(pipe_ctx);
11291129

11301130
if (pipe_ctx->stream_res.audio)

‎drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -203,12 +203,12 @@ enum dcn35_clk_src_array_id {
203203
NBIO_BASE_INNER(seg)
204204

205205
#define NBIO_SR(reg_name)\
206-
REG_STRUCT.reg_name = NBIO_BASE(regBIF_BX2_ ## reg_name ## _BASE_IDX) + \
207-
regBIF_BX2_ ## reg_name
206+
REG_STRUCT.reg_name = NBIO_BASE(regBIF_BX1_ ## reg_name ## _BASE_IDX) + \
207+
regBIF_BX1_ ## reg_name
208208

209209
#define NBIO_SR_ARR(reg_name, id)\
210-
REG_STRUCT[id].reg_name = NBIO_BASE(regBIF_BX2_ ## reg_name ## _BASE_IDX) + \
211-
regBIF_BX2_ ## reg_name
210+
REG_STRUCT[id].reg_name = NBIO_BASE(regBIF_BX1_ ## reg_name ## _BASE_IDX) + \
211+
regBIF_BX1_ ## reg_name
212212

213213
#define bios_regs_init() \
214214
( \

‎drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -183,12 +183,12 @@ enum dcn351_clk_src_array_id {
183183
NBIO_BASE_INNER(seg)
184184

185185
#define NBIO_SR(reg_name)\
186-
REG_STRUCT.reg_name = NBIO_BASE(regBIF_BX2_ ## reg_name ## _BASE_IDX) + \
187-
regBIF_BX2_ ## reg_name
186+
REG_STRUCT.reg_name = NBIO_BASE(regBIF_BX1_ ## reg_name ## _BASE_IDX) + \
187+
regBIF_BX1_ ## reg_name
188188

189189
#define NBIO_SR_ARR(reg_name, id)\
190-
REG_STRUCT[id].reg_name = NBIO_BASE(regBIF_BX2_ ## reg_name ## _BASE_IDX) + \
191-
regBIF_BX2_ ## reg_name
190+
REG_STRUCT[id].reg_name = NBIO_BASE(regBIF_BX1_ ## reg_name ## _BASE_IDX) + \
191+
regBIF_BX1_ ## reg_name
192192

193193
#define bios_regs_init() \
194194
( \

‎drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1939,6 +1939,11 @@ int smu_v14_0_od_edit_dpm_table(struct smu_context *smu,
19391939
dev_err(smu->adev->dev, "Set soft max sclk failed!");
19401940
return ret;
19411941
}
1942+
if (smu->gfx_actual_hard_min_freq != smu->gfx_default_hard_min_freq ||
1943+
smu->gfx_actual_soft_max_freq != smu->gfx_default_soft_max_freq)
1944+
smu->user_dpm_profile.user_od = true;
1945+
else
1946+
smu->user_dpm_profile.user_od = false;
19421947
break;
19431948
default:
19441949
return -ENOSYS;

‎drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c‎

Lines changed: 32 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1514,9 +1514,10 @@ static int smu_v14_0_1_set_fine_grain_gfx_freq_parameters(struct smu_context *sm
15141514

15151515
smu->gfx_default_hard_min_freq = clk_table->MinGfxClk;
15161516
smu->gfx_default_soft_max_freq = clk_table->MaxGfxClk;
1517-
smu->gfx_actual_hard_min_freq = 0;
1518-
smu->gfx_actual_soft_max_freq = 0;
1519-
1517+
if (smu->gfx_actual_hard_min_freq == 0)
1518+
smu->gfx_actual_hard_min_freq = smu->gfx_default_hard_min_freq;
1519+
if (smu->gfx_actual_soft_max_freq == 0)
1520+
smu->gfx_actual_soft_max_freq = smu->gfx_default_soft_max_freq;
15201521
return 0;
15211522
}
15221523

@@ -1526,8 +1527,10 @@ static int smu_v14_0_0_set_fine_grain_gfx_freq_parameters(struct smu_context *sm
15261527

15271528
smu->gfx_default_hard_min_freq = clk_table->MinGfxClk;
15281529
smu->gfx_default_soft_max_freq = clk_table->MaxGfxClk;
1529-
smu->gfx_actual_hard_min_freq = 0;
1530-
smu->gfx_actual_soft_max_freq = 0;
1530+
if (smu->gfx_actual_hard_min_freq == 0)
1531+
smu->gfx_actual_hard_min_freq = smu->gfx_default_hard_min_freq;
1532+
if (smu->gfx_actual_soft_max_freq == 0)
1533+
smu->gfx_actual_soft_max_freq = smu->gfx_default_soft_max_freq;
15311534

15321535
return 0;
15331536
}
@@ -1665,6 +1668,29 @@ static int smu_v14_0_common_set_mall_enable(struct smu_context *smu)
16651668
return ret;
16661669
}
16671670

1671+
static int smu_v14_0_0_restore_user_od_settings(struct smu_context *smu)
1672+
{
1673+
int ret;
1674+
1675+
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetHardMinGfxClk,
1676+
smu->gfx_actual_hard_min_freq,
1677+
NULL);
1678+
if (ret) {
1679+
dev_err(smu->adev->dev, "Failed to restore hard min sclk!\n");
1680+
return ret;
1681+
}
1682+
1683+
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetSoftMaxGfxClk,
1684+
smu->gfx_actual_soft_max_freq,
1685+
NULL);
1686+
if (ret) {
1687+
dev_err(smu->adev->dev, "Failed to restore soft max sclk!\n");
1688+
return ret;
1689+
}
1690+
1691+
return 0;
1692+
}
1693+
16681694
static const struct pptable_funcs smu_v14_0_0_ppt_funcs = {
16691695
.check_fw_status = smu_v14_0_check_fw_status,
16701696
.check_fw_version = smu_v14_0_check_fw_version,
@@ -1688,6 +1714,7 @@ static const struct pptable_funcs smu_v14_0_0_ppt_funcs = {
16881714
.mode2_reset = smu_v14_0_0_mode2_reset,
16891715
.get_dpm_ultimate_freq = smu_v14_0_common_get_dpm_ultimate_freq,
16901716
.set_soft_freq_limited_range = smu_v14_0_0_set_soft_freq_limited_range,
1717+
.restore_user_od_settings = smu_v14_0_0_restore_user_od_settings,
16911718
.od_edit_dpm_table = smu_v14_0_od_edit_dpm_table,
16921719
.print_clk_levels = smu_v14_0_0_print_clk_levels,
16931720
.force_clk_levels = smu_v14_0_0_force_clk_levels,

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