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neuschaeferWim Van Sebroeck
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dt-bindings: watchdog: Convert mpc8xxx-wdt to YAML
Convert mpc83xx-wdt.txt to YAML to enable automatic schema validation. Signed-off-by: J. Neuschäfer <j.ne@posteo.net> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
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Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.txt

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/watchdog/mpc8xxx-wdt.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale MPC8xxx watchdog timer (For 83xx, 86xx and 8xx)
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maintainers:
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- J. Neuschäfer <j.ne@posteo.net>
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properties:
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compatible:
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enum:
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- mpc83xx_wdt # for an mpc83xx
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- fsl,mpc8610-wdt # for an mpc86xx
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- fsl,mpc823-wdt # for an mpc8xx
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device_type:
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const: watchdog
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reg:
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minItems: 1
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items:
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- description: |
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Base physical address and length of the area hosting the watchdog
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registers.
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On the 83xx, "Watchdog Timer Registers" area: <0x200 0x100>
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On the 86xx, "Watchdog Timer Registers" area: <0xe4000 0x100>
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On the 8xx, "General System Interface Unit" area: <0x0 0x10>
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- description: |
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Additional optional physical address and length (4) of location of
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the Reset Status Register (called RSTRSCR on the mpc86xx)
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On the 83xx, it is located at offset 0x910
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On the 86xx, it is located at offset 0xe0094
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On the 8xx, it is located at offset 0x288
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required:
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- compatible
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- reg
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allOf:
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- $ref: watchdog.yaml#
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additionalProperties: false
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examples:
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- |
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watchdog@0 {
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compatible = "fsl,mpc823-wdt";
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reg = <0x0 0x10 0x288 0x4>;
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};
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- |
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watchdog@200 {
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compatible = "mpc83xx_wdt";
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reg = <0x200 0x100>;
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device_type = "watchdog";
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};
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...

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