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sknseanlag-linaro
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mfd: stpmic1: Fixup main control register and bits naming
Fixup main control register and bits naming so the match the naming from the datasheet. https://www.st.com/resource/en/datasheet/stpmic1.pdf Signed-off-by: Sean Nyekjaer <sean@geanix.com> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20230602062426.3947116-1-sean@geanix.com
1 parent 2ce68cf commit 48b4371

2 files changed

Lines changed: 8 additions & 8 deletions

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drivers/mfd/stpmic1.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@
1919

2020
static const struct regmap_range stpmic1_readable_ranges[] = {
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regmap_reg_range(TURN_ON_SR, VERSION_SR),
22-
regmap_reg_range(SWOFF_PWRCTRL_CR, LDO6_STDBY_CR),
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regmap_reg_range(MAIN_CR, LDO6_STDBY_CR),
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regmap_reg_range(BST_SW_CR, BST_SW_CR),
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regmap_reg_range(INT_PENDING_R1, INT_PENDING_R4),
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regmap_reg_range(INT_CLEAR_R1, INT_CLEAR_R4),
@@ -30,7 +30,7 @@ static const struct regmap_range stpmic1_readable_ranges[] = {
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};
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static const struct regmap_range stpmic1_writeable_ranges[] = {
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regmap_reg_range(SWOFF_PWRCTRL_CR, LDO6_STDBY_CR),
33+
regmap_reg_range(MAIN_CR, LDO6_STDBY_CR),
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regmap_reg_range(BST_SW_CR, BST_SW_CR),
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regmap_reg_range(INT_CLEAR_R1, INT_CLEAR_R4),
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regmap_reg_range(INT_SET_MASK_R1, INT_SET_MASK_R4),

include/linux/mfd/stpmic1.h

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,7 @@
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#define RREQ_STATE_SR 0x5
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#define VERSION_SR 0x6
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18-
#define SWOFF_PWRCTRL_CR 0x10
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#define MAIN_CR 0x10
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#define PADS_PULL_CR 0x11
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#define BUCKS_PD_CR 0x12
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#define LDO14_PD_CR 0x13
@@ -148,14 +148,14 @@
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#define LDO_BYPASS_MASK BIT(7)
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150150
/* Main PMIC Control Register
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* SWOFF_PWRCTRL_CR
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* MAIN_CR
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* Address : 0x10
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*/
154-
#define ICC_EVENT_ENABLED BIT(4)
154+
#define OCP_OFF_DBG BIT(4)
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#define PWRCTRL_POLARITY_HIGH BIT(3)
156-
#define PWRCTRL_PIN_VALID BIT(2)
157-
#define RESTART_REQUEST_ENABLED BIT(1)
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#define SOFTWARE_SWITCH_OFF_ENABLED BIT(0)
156+
#define PWRCTRL_ENABLE BIT(2)
157+
#define RESTART_REQUEST_ENABLE BIT(1)
158+
#define SOFTWARE_SWITCH_OFF BIT(0)
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/* Main PMIC PADS Control Register
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* PADS_PULL_CR

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