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lumagandersson
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clk: qcom: cpu-8996: fix ACD initialization
The vendor kernel applies different order while programming SSSCTL and L2ACDCR registers on power and performance clusters. However it was demonstrated that doing this upstream results in the board reset. Make both clusters use the same sequence, which fixes the reset. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230113120544.59320-12-dmitry.baryshkov@linaro.org
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1 file changed

Lines changed: 8 additions & 12 deletions

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drivers/clk/qcom/clk-cpu-8996.c

Lines changed: 8 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -475,9 +475,9 @@ static int qcom_cpu_clk_msm8996_register_clks(struct device *dev,
475475
return ret;
476476
}
477477

478-
#define CPU_AFINITY_MASK 0xFFF
479-
#define PWRCL_CPU_REG_MASK 0x3
480-
#define PERFCL_CPU_REG_MASK 0x103
478+
#define CPU_CLUSTER_AFFINITY_MASK 0xf00
479+
#define PWRCL_AFFINITY_MASK 0x000
480+
#define PERFCL_AFFINITY_MASK 0x100
481481

482482
#define L2ACDCR_REG 0x580ULL
483483
#define L2ACDTD_REG 0x581ULL
@@ -498,21 +498,17 @@ static void qcom_cpu_clk_msm8996_acd_init(struct regmap *regmap)
498498
if (val == 0x00006a11)
499499
goto out;
500500

501-
hwid = read_cpuid_mpidr() & CPU_AFINITY_MASK;
502-
503501
kryo_l2_set_indirect_reg(L2ACDTD_REG, 0x00006a11);
504502
kryo_l2_set_indirect_reg(L2ACDDVMRC_REG, 0x000e0f0f);
505503
kryo_l2_set_indirect_reg(L2ACDSSCR_REG, 0x00000601);
506504

507-
if (PWRCL_CPU_REG_MASK == (hwid | PWRCL_CPU_REG_MASK)) {
508-
regmap_write(regmap, PWRCL_REG_OFFSET + SSSCTL_OFFSET, 0xf);
509-
kryo_l2_set_indirect_reg(L2ACDCR_REG, 0x002c5ffd);
510-
}
505+
kryo_l2_set_indirect_reg(L2ACDCR_REG, 0x002c5ffd);
511506

512-
if (PERFCL_CPU_REG_MASK == (hwid | PERFCL_CPU_REG_MASK)) {
513-
kryo_l2_set_indirect_reg(L2ACDCR_REG, 0x002c5ffd);
507+
hwid = read_cpuid_mpidr();
508+
if ((hwid & CPU_CLUSTER_AFFINITY_MASK) == PWRCL_AFFINITY_MASK)
509+
regmap_write(regmap, PWRCL_REG_OFFSET + SSSCTL_OFFSET, 0xf);
510+
else
514511
regmap_write(regmap, PERFCL_REG_OFFSET + SSSCTL_OFFSET, 0xf);
515-
}
516512

517513
out:
518514
spin_unlock_irqrestore(&qcom_clk_acd_lock, flags);

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