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Linus Walleijvinodkoul
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dt-bindings: dma: dma40: Prefer to pass sram through phandle
Extend the DMA40 bindings so that we can pass two SRAM segments as phandles instead of directly referring to the memory address in the second reg cell. This enables more granular control over the SRAM, and adds the optiona LCLA SRAM segment as well. Deprecate the old way of passing LCPA as a second reg cell, make sram compulsory. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20230417-ux500-dma40-cleanup-v3-1-60bfa6785968@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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Documentation/devicetree/bindings/dma/stericsson,dma40.yaml

Lines changed: 28 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -112,21 +112,39 @@ properties:
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- const: stericsson,dma40
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reg:
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items:
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- description: DMA40 memory base
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- description: LCPA memory base
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oneOf:
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- items:
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- description: DMA40 memory base
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- items:
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- description: DMA40 memory base
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- description: LCPA memory base, deprecated, use eSRAM pool instead
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deprecated: true
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reg-names:
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items:
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- const: base
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- const: lcpa
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oneOf:
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- items:
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- const: base
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- items:
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- const: base
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- const: lcpa
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deprecated: true
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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sram:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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description: A phandle array with inner size 1 (no arg cells).
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First phandle is the LCPA (Logical Channel Parameter Address) memory.
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Second phandle is the LCLA (Logical Channel Link base Address) memory.
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maxItems: 2
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items:
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maxItems: 1
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memcpy-channels:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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description: Array of u32 elements indicating which channels on the DMA
@@ -138,6 +156,7 @@ required:
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- reg
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- interrupts
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- clocks
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- sram
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- memcpy-channels
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additionalProperties: false
@@ -149,8 +168,9 @@ examples:
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#include <dt-bindings/mfd/dbx500-prcmu.h>
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dma-controller@801c0000 {
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compatible = "stericsson,db8500-dma40", "stericsson,dma40";
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reg = <0x801c0000 0x1000>, <0x40010000 0x800>;
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reg-names = "base", "lcpa";
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reg = <0x801c0000 0x1000>;
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reg-names = "base";
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sram = <&lcpa>, <&lcla>;
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interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
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#dma-cells = <3>;
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memcpy-channels = <56 57 58 59 60>;

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