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| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | +%YAML 1.2 |
| 3 | +--- |
| 4 | +$id: http://devicetree.org/schemas/display/mediatek/mediatek,padding.yaml# |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | + |
| 7 | +title: MediaTek Display Padding |
| 8 | + |
| 9 | +maintainers: |
| 10 | + - Chun-Kuang Hu <chunkuang.hu@kernel.org> |
| 11 | + - Philipp Zabel <p.zabel@pengutronix.de> |
| 12 | + |
| 13 | +description: |
| 14 | + Padding provides ability to add pixels to width and height of a layer with |
| 15 | + specified colors. Due to hardware design, Mixer in VDOSYS1 requires |
| 16 | + width of a layer to be 2-pixel-align, or 4-pixel-align when ETHDR is enabled, |
| 17 | + we need Padding to deal with odd width. |
| 18 | + Please notice that even if the Padding is in bypass mode, settings in |
| 19 | + register must be cleared to 0, or undefined behaviors could happen. |
| 20 | + |
| 21 | +properties: |
| 22 | + compatible: |
| 23 | + const: mediatek,mt8188-disp-padding |
| 24 | + |
| 25 | + reg: |
| 26 | + maxItems: 1 |
| 27 | + |
| 28 | + power-domains: |
| 29 | + maxItems: 1 |
| 30 | + |
| 31 | + clocks: |
| 32 | + items: |
| 33 | + - description: Padding's clocks |
| 34 | + |
| 35 | + mediatek,gce-client-reg: |
| 36 | + description: |
| 37 | + GCE (Global Command Engine) is a multi-core micro processor that helps |
| 38 | + its clients to execute commands without interrupting CPU. This property |
| 39 | + describes GCE client's information that is composed by 4 fields. |
| 40 | + 1. Phandle of the GCE (there may be several GCE processors) |
| 41 | + 2. Sub-system ID defined in the dt-binding like a user ID |
| 42 | + (Please refer to include/dt-bindings/gce/<chip>-gce.h) |
| 43 | + 3. Offset from base address of the subsys you are at |
| 44 | + 4. Size of the register the client needs |
| 45 | + $ref: /schemas/types.yaml#/definitions/phandle-array |
| 46 | + items: |
| 47 | + items: |
| 48 | + - description: Phandle of the GCE |
| 49 | + - description: Subsys ID defined in the dt-binding |
| 50 | + - description: Offset from base address of the subsys |
| 51 | + - description: Size of register |
| 52 | + maxItems: 1 |
| 53 | + |
| 54 | +required: |
| 55 | + - compatible |
| 56 | + - reg |
| 57 | + - power-domains |
| 58 | + - clocks |
| 59 | + - mediatek,gce-client-reg |
| 60 | + |
| 61 | +additionalProperties: false |
| 62 | + |
| 63 | +examples: |
| 64 | + - | |
| 65 | + #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 66 | + #include <dt-bindings/clock/mediatek,mt8188-clk.h> |
| 67 | + #include <dt-bindings/power/mediatek,mt8188-power.h> |
| 68 | + #include <dt-bindings/gce/mt8195-gce.h> |
| 69 | +
|
| 70 | + soc { |
| 71 | + #address-cells = <2>; |
| 72 | + #size-cells = <2>; |
| 73 | +
|
| 74 | + padding0: padding@1c11d000 { |
| 75 | + compatible = "mediatek,mt8188-disp-padding"; |
| 76 | + reg = <0 0x1c11d000 0 0x1000>; |
| 77 | + clocks = <&vdosys1 CLK_VDO1_PADDING0>; |
| 78 | + power-domains = <&spm MT8188_POWER_DOMAIN_VDOSYS1>; |
| 79 | + mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0xd000 0x1000>; |
| 80 | + }; |
| 81 | + }; |
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