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KVM: VMX: Split off vmx_onhyperv.{ch} from hyperv.{ch}
hyperv.{ch} is currently a mix of stuff which is needed by both Hyper-V on KVM and KVM on Hyper-V. As a preparation to making Hyper-V emulation optional, put KVM-on-Hyper-V specific code into dedicated files. No functional change intended. Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com> Tested-by: Jeremi Piotrowski <jpiotrowski@linux.microsoft.com> Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com> Link: https://lore.kernel.org/r/20231205103630.1391318-4-vkuznets@redhat.com Signed-off-by: Sean Christopherson <seanjc@google.com>
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‎arch/x86/kvm/Makefile‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,10 @@ kvm-intel-y += vmx/vmx.o vmx/vmenter.o vmx/pmu_intel.o vmx/vmcs12.o \
2626
vmx/hyperv.o vmx/nested.o vmx/posted_intr.o
2727
kvm-intel-$(CONFIG_X86_SGX_KVM) += vmx/sgx.o
2828

29+
ifdef CONFIG_HYPERV
30+
kvm-intel-y += vmx/vmx_onhyperv.o
31+
endif
32+
2933
kvm-amd-y += svm/svm.o svm/vmenter.o svm/pmu.o svm/nested.o svm/avic.o \
3034
svm/sev.o svm/hyperv.o
3135

‎arch/x86/kvm/vmx/hyperv.c‎

Lines changed: 0 additions & 139 deletions
Original file line numberDiff line numberDiff line change
@@ -13,111 +13,6 @@
1313

1414
#define CC KVM_NESTED_VMENTER_CONSISTENCY_CHECK
1515

16-
/*
17-
* Enlightened VMCSv1 doesn't support these:
18-
*
19-
* POSTED_INTR_NV = 0x00000002,
20-
* GUEST_INTR_STATUS = 0x00000810,
21-
* APIC_ACCESS_ADDR = 0x00002014,
22-
* POSTED_INTR_DESC_ADDR = 0x00002016,
23-
* EOI_EXIT_BITMAP0 = 0x0000201c,
24-
* EOI_EXIT_BITMAP1 = 0x0000201e,
25-
* EOI_EXIT_BITMAP2 = 0x00002020,
26-
* EOI_EXIT_BITMAP3 = 0x00002022,
27-
* GUEST_PML_INDEX = 0x00000812,
28-
* PML_ADDRESS = 0x0000200e,
29-
* VM_FUNCTION_CONTROL = 0x00002018,
30-
* EPTP_LIST_ADDRESS = 0x00002024,
31-
* VMREAD_BITMAP = 0x00002026,
32-
* VMWRITE_BITMAP = 0x00002028,
33-
*
34-
* TSC_MULTIPLIER = 0x00002032,
35-
* PLE_GAP = 0x00004020,
36-
* PLE_WINDOW = 0x00004022,
37-
* VMX_PREEMPTION_TIMER_VALUE = 0x0000482E,
38-
*
39-
* Currently unsupported in KVM:
40-
* GUEST_IA32_RTIT_CTL = 0x00002814,
41-
*/
42-
#define EVMCS1_SUPPORTED_PINCTRL \
43-
(PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR | \
44-
PIN_BASED_EXT_INTR_MASK | \
45-
PIN_BASED_NMI_EXITING | \
46-
PIN_BASED_VIRTUAL_NMIS)
47-
48-
#define EVMCS1_SUPPORTED_EXEC_CTRL \
49-
(CPU_BASED_ALWAYSON_WITHOUT_TRUE_MSR | \
50-
CPU_BASED_HLT_EXITING | \
51-
CPU_BASED_CR3_LOAD_EXITING | \
52-
CPU_BASED_CR3_STORE_EXITING | \
53-
CPU_BASED_UNCOND_IO_EXITING | \
54-
CPU_BASED_MOV_DR_EXITING | \
55-
CPU_BASED_USE_TSC_OFFSETTING | \
56-
CPU_BASED_MWAIT_EXITING | \
57-
CPU_BASED_MONITOR_EXITING | \
58-
CPU_BASED_INVLPG_EXITING | \
59-
CPU_BASED_RDPMC_EXITING | \
60-
CPU_BASED_INTR_WINDOW_EXITING | \
61-
CPU_BASED_CR8_LOAD_EXITING | \
62-
CPU_BASED_CR8_STORE_EXITING | \
63-
CPU_BASED_RDTSC_EXITING | \
64-
CPU_BASED_TPR_SHADOW | \
65-
CPU_BASED_USE_IO_BITMAPS | \
66-
CPU_BASED_MONITOR_TRAP_FLAG | \
67-
CPU_BASED_USE_MSR_BITMAPS | \
68-
CPU_BASED_NMI_WINDOW_EXITING | \
69-
CPU_BASED_PAUSE_EXITING | \
70-
CPU_BASED_ACTIVATE_SECONDARY_CONTROLS)
71-
72-
#define EVMCS1_SUPPORTED_2NDEXEC \
73-
(SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE | \
74-
SECONDARY_EXEC_WBINVD_EXITING | \
75-
SECONDARY_EXEC_ENABLE_VPID | \
76-
SECONDARY_EXEC_ENABLE_EPT | \
77-
SECONDARY_EXEC_UNRESTRICTED_GUEST | \
78-
SECONDARY_EXEC_DESC | \
79-
SECONDARY_EXEC_ENABLE_RDTSCP | \
80-
SECONDARY_EXEC_ENABLE_INVPCID | \
81-
SECONDARY_EXEC_ENABLE_XSAVES | \
82-
SECONDARY_EXEC_RDSEED_EXITING | \
83-
SECONDARY_EXEC_RDRAND_EXITING | \
84-
SECONDARY_EXEC_TSC_SCALING | \
85-
SECONDARY_EXEC_ENABLE_USR_WAIT_PAUSE | \
86-
SECONDARY_EXEC_PT_USE_GPA | \
87-
SECONDARY_EXEC_PT_CONCEAL_VMX | \
88-
SECONDARY_EXEC_BUS_LOCK_DETECTION | \
89-
SECONDARY_EXEC_NOTIFY_VM_EXITING | \
90-
SECONDARY_EXEC_ENCLS_EXITING)
91-
92-
#define EVMCS1_SUPPORTED_3RDEXEC (0ULL)
93-
94-
#define EVMCS1_SUPPORTED_VMEXIT_CTRL \
95-
(VM_EXIT_ALWAYSON_WITHOUT_TRUE_MSR | \
96-
VM_EXIT_SAVE_DEBUG_CONTROLS | \
97-
VM_EXIT_ACK_INTR_ON_EXIT | \
98-
VM_EXIT_HOST_ADDR_SPACE_SIZE | \
99-
VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL | \
100-
VM_EXIT_SAVE_IA32_PAT | \
101-
VM_EXIT_LOAD_IA32_PAT | \
102-
VM_EXIT_SAVE_IA32_EFER | \
103-
VM_EXIT_LOAD_IA32_EFER | \
104-
VM_EXIT_CLEAR_BNDCFGS | \
105-
VM_EXIT_PT_CONCEAL_PIP | \
106-
VM_EXIT_CLEAR_IA32_RTIT_CTL)
107-
108-
#define EVMCS1_SUPPORTED_VMENTRY_CTRL \
109-
(VM_ENTRY_ALWAYSON_WITHOUT_TRUE_MSR | \
110-
VM_ENTRY_LOAD_DEBUG_CONTROLS | \
111-
VM_ENTRY_IA32E_MODE | \
112-
VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL | \
113-
VM_ENTRY_LOAD_IA32_PAT | \
114-
VM_ENTRY_LOAD_IA32_EFER | \
115-
VM_ENTRY_LOAD_BNDCFGS | \
116-
VM_ENTRY_PT_CONCEAL_PIP | \
117-
VM_ENTRY_LOAD_IA32_RTIT_CTL)
118-
119-
#define EVMCS1_SUPPORTED_VMFUNC (0)
120-
12116
#define EVMCS1_OFFSET(x) offsetof(struct hv_enlightened_vmcs, x)
12217
#define EVMCS1_FIELD(number, name, clean_field)[ROL16(number, 6)] = \
12318
{EVMCS1_OFFSET(name), clean_field}
@@ -608,40 +503,6 @@ int nested_evmcs_check_controls(struct vmcs12 *vmcs12)
608503
return 0;
609504
}
610505

611-
#if IS_ENABLED(CONFIG_HYPERV)
612-
DEFINE_STATIC_KEY_FALSE(__kvm_is_using_evmcs);
613-
614-
/*
615-
* KVM on Hyper-V always uses the latest known eVMCSv1 revision, the assumption
616-
* is: in case a feature has corresponding fields in eVMCS described and it was
617-
* exposed in VMX feature MSRs, KVM is free to use it. Warn if KVM meets a
618-
* feature which has no corresponding eVMCS field, this likely means that KVM
619-
* needs to be updated.
620-
*/
621-
#define evmcs_check_vmcs_conf(field, ctrl) \
622-
do { \
623-
typeof(vmcs_conf->field) unsupported; \
624-
\
625-
unsupported = vmcs_conf->field & ~EVMCS1_SUPPORTED_ ## ctrl; \
626-
if (unsupported) { \
627-
pr_warn_once(#field " unsupported with eVMCS: 0x%llx\n",\
628-
(u64)unsupported); \
629-
vmcs_conf->field &= EVMCS1_SUPPORTED_ ## ctrl; \
630-
} \
631-
} \
632-
while (0)
633-
634-
void evmcs_sanitize_exec_ctrls(struct vmcs_config *vmcs_conf)
635-
{
636-
evmcs_check_vmcs_conf(cpu_based_exec_ctrl, EXEC_CTRL);
637-
evmcs_check_vmcs_conf(pin_based_exec_ctrl, PINCTRL);
638-
evmcs_check_vmcs_conf(cpu_based_2nd_exec_ctrl, 2NDEXEC);
639-
evmcs_check_vmcs_conf(cpu_based_3rd_exec_ctrl, 3RDEXEC);
640-
evmcs_check_vmcs_conf(vmentry_ctrl, VMENTRY_CTRL);
641-
evmcs_check_vmcs_conf(vmexit_ctrl, VMEXIT_CTRL);
642-
}
643-
#endif
644-
645506
int nested_enable_evmcs(struct kvm_vcpu *vcpu,
646507
uint16_t *vmcs_version)
647508
{

‎arch/x86/kvm/vmx/hyperv.h‎

Lines changed: 105 additions & 112 deletions
Original file line numberDiff line numberDiff line change
@@ -14,12 +14,113 @@
1414
#include "vmcs.h"
1515
#include "vmcs12.h"
1616

17-
struct vmcs_config;
18-
19-
#define current_evmcs ((struct hv_enlightened_vmcs *)this_cpu_read(current_vmcs))
20-
2117
#define KVM_EVMCS_VERSION 1
2218

19+
/*
20+
* Enlightened VMCSv1 doesn't support these:
21+
*
22+
* POSTED_INTR_NV = 0x00000002,
23+
* GUEST_INTR_STATUS = 0x00000810,
24+
* APIC_ACCESS_ADDR = 0x00002014,
25+
* POSTED_INTR_DESC_ADDR = 0x00002016,
26+
* EOI_EXIT_BITMAP0 = 0x0000201c,
27+
* EOI_EXIT_BITMAP1 = 0x0000201e,
28+
* EOI_EXIT_BITMAP2 = 0x00002020,
29+
* EOI_EXIT_BITMAP3 = 0x00002022,
30+
* GUEST_PML_INDEX = 0x00000812,
31+
* PML_ADDRESS = 0x0000200e,
32+
* VM_FUNCTION_CONTROL = 0x00002018,
33+
* EPTP_LIST_ADDRESS = 0x00002024,
34+
* VMREAD_BITMAP = 0x00002026,
35+
* VMWRITE_BITMAP = 0x00002028,
36+
*
37+
* TSC_MULTIPLIER = 0x00002032,
38+
* PLE_GAP = 0x00004020,
39+
* PLE_WINDOW = 0x00004022,
40+
* VMX_PREEMPTION_TIMER_VALUE = 0x0000482E,
41+
*
42+
* Currently unsupported in KVM:
43+
* GUEST_IA32_RTIT_CTL = 0x00002814,
44+
*/
45+
#define EVMCS1_SUPPORTED_PINCTRL \
46+
(PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR | \
47+
PIN_BASED_EXT_INTR_MASK | \
48+
PIN_BASED_NMI_EXITING | \
49+
PIN_BASED_VIRTUAL_NMIS)
50+
51+
#define EVMCS1_SUPPORTED_EXEC_CTRL \
52+
(CPU_BASED_ALWAYSON_WITHOUT_TRUE_MSR | \
53+
CPU_BASED_HLT_EXITING | \
54+
CPU_BASED_CR3_LOAD_EXITING | \
55+
CPU_BASED_CR3_STORE_EXITING | \
56+
CPU_BASED_UNCOND_IO_EXITING | \
57+
CPU_BASED_MOV_DR_EXITING | \
58+
CPU_BASED_USE_TSC_OFFSETTING | \
59+
CPU_BASED_MWAIT_EXITING | \
60+
CPU_BASED_MONITOR_EXITING | \
61+
CPU_BASED_INVLPG_EXITING | \
62+
CPU_BASED_RDPMC_EXITING | \
63+
CPU_BASED_INTR_WINDOW_EXITING | \
64+
CPU_BASED_CR8_LOAD_EXITING | \
65+
CPU_BASED_CR8_STORE_EXITING | \
66+
CPU_BASED_RDTSC_EXITING | \
67+
CPU_BASED_TPR_SHADOW | \
68+
CPU_BASED_USE_IO_BITMAPS | \
69+
CPU_BASED_MONITOR_TRAP_FLAG | \
70+
CPU_BASED_USE_MSR_BITMAPS | \
71+
CPU_BASED_NMI_WINDOW_EXITING | \
72+
CPU_BASED_PAUSE_EXITING | \
73+
CPU_BASED_ACTIVATE_SECONDARY_CONTROLS)
74+
75+
#define EVMCS1_SUPPORTED_2NDEXEC \
76+
(SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE | \
77+
SECONDARY_EXEC_WBINVD_EXITING | \
78+
SECONDARY_EXEC_ENABLE_VPID | \
79+
SECONDARY_EXEC_ENABLE_EPT | \
80+
SECONDARY_EXEC_UNRESTRICTED_GUEST | \
81+
SECONDARY_EXEC_DESC | \
82+
SECONDARY_EXEC_ENABLE_RDTSCP | \
83+
SECONDARY_EXEC_ENABLE_INVPCID | \
84+
SECONDARY_EXEC_ENABLE_XSAVES | \
85+
SECONDARY_EXEC_RDSEED_EXITING | \
86+
SECONDARY_EXEC_RDRAND_EXITING | \
87+
SECONDARY_EXEC_TSC_SCALING | \
88+
SECONDARY_EXEC_ENABLE_USR_WAIT_PAUSE | \
89+
SECONDARY_EXEC_PT_USE_GPA | \
90+
SECONDARY_EXEC_PT_CONCEAL_VMX | \
91+
SECONDARY_EXEC_BUS_LOCK_DETECTION | \
92+
SECONDARY_EXEC_NOTIFY_VM_EXITING | \
93+
SECONDARY_EXEC_ENCLS_EXITING)
94+
95+
#define EVMCS1_SUPPORTED_3RDEXEC (0ULL)
96+
97+
#define EVMCS1_SUPPORTED_VMEXIT_CTRL \
98+
(VM_EXIT_ALWAYSON_WITHOUT_TRUE_MSR | \
99+
VM_EXIT_SAVE_DEBUG_CONTROLS | \
100+
VM_EXIT_ACK_INTR_ON_EXIT | \
101+
VM_EXIT_HOST_ADDR_SPACE_SIZE | \
102+
VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL | \
103+
VM_EXIT_SAVE_IA32_PAT | \
104+
VM_EXIT_LOAD_IA32_PAT | \
105+
VM_EXIT_SAVE_IA32_EFER | \
106+
VM_EXIT_LOAD_IA32_EFER | \
107+
VM_EXIT_CLEAR_BNDCFGS | \
108+
VM_EXIT_PT_CONCEAL_PIP | \
109+
VM_EXIT_CLEAR_IA32_RTIT_CTL)
110+
111+
#define EVMCS1_SUPPORTED_VMENTRY_CTRL \
112+
(VM_ENTRY_ALWAYSON_WITHOUT_TRUE_MSR | \
113+
VM_ENTRY_LOAD_DEBUG_CONTROLS | \
114+
VM_ENTRY_IA32E_MODE | \
115+
VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL | \
116+
VM_ENTRY_LOAD_IA32_PAT | \
117+
VM_ENTRY_LOAD_IA32_EFER | \
118+
VM_ENTRY_LOAD_BNDCFGS | \
119+
VM_ENTRY_PT_CONCEAL_PIP | \
120+
VM_ENTRY_LOAD_IA32_RTIT_CTL)
121+
122+
#define EVMCS1_SUPPORTED_VMFUNC (0)
123+
23124
struct evmcs_field {
24125
u16 offset;
25126
u16 clean_field;
@@ -65,114 +166,6 @@ static inline u64 evmcs_read_any(struct hv_enlightened_vmcs *evmcs,
65166
return vmcs12_read_any((void *)evmcs, field, offset);
66167
}
67168

68-
#if IS_ENABLED(CONFIG_HYPERV)
69-
70-
DECLARE_STATIC_KEY_FALSE(__kvm_is_using_evmcs);
71-
72-
static __always_inline bool kvm_is_using_evmcs(void)
73-
{
74-
return static_branch_unlikely(&__kvm_is_using_evmcs);
75-
}
76-
77-
static __always_inline int get_evmcs_offset(unsigned long field,
78-
u16 *clean_field)
79-
{
80-
int offset = evmcs_field_offset(field, clean_field);
81-
82-
WARN_ONCE(offset < 0, "accessing unsupported EVMCS field %lx\n", field);
83-
return offset;
84-
}
85-
86-
static __always_inline void evmcs_write64(unsigned long field, u64 value)
87-
{
88-
u16 clean_field;
89-
int offset = get_evmcs_offset(field, &clean_field);
90-
91-
if (offset < 0)
92-
return;
93-
94-
*(u64 *)((char *)current_evmcs + offset) = value;
95-
96-
current_evmcs->hv_clean_fields &= ~clean_field;
97-
}
98-
99-
static __always_inline void evmcs_write32(unsigned long field, u32 value)
100-
{
101-
u16 clean_field;
102-
int offset = get_evmcs_offset(field, &clean_field);
103-
104-
if (offset < 0)
105-
return;
106-
107-
*(u32 *)((char *)current_evmcs + offset) = value;
108-
current_evmcs->hv_clean_fields &= ~clean_field;
109-
}
110-
111-
static __always_inline void evmcs_write16(unsigned long field, u16 value)
112-
{
113-
u16 clean_field;
114-
int offset = get_evmcs_offset(field, &clean_field);
115-
116-
if (offset < 0)
117-
return;
118-
119-
*(u16 *)((char *)current_evmcs + offset) = value;
120-
current_evmcs->hv_clean_fields &= ~clean_field;
121-
}
122-
123-
static __always_inline u64 evmcs_read64(unsigned long field)
124-
{
125-
int offset = get_evmcs_offset(field, NULL);
126-
127-
if (offset < 0)
128-
return 0;
129-
130-
return *(u64 *)((char *)current_evmcs + offset);
131-
}
132-
133-
static __always_inline u32 evmcs_read32(unsigned long field)
134-
{
135-
int offset = get_evmcs_offset(field, NULL);
136-
137-
if (offset < 0)
138-
return 0;
139-
140-
return *(u32 *)((char *)current_evmcs + offset);
141-
}
142-
143-
static __always_inline u16 evmcs_read16(unsigned long field)
144-
{
145-
int offset = get_evmcs_offset(field, NULL);
146-
147-
if (offset < 0)
148-
return 0;
149-
150-
return *(u16 *)((char *)current_evmcs + offset);
151-
}
152-
153-
static inline void evmcs_load(u64 phys_addr)
154-
{
155-
struct hv_vp_assist_page *vp_ap =
156-
hv_get_vp_assist_page(smp_processor_id());
157-
158-
if (current_evmcs->hv_enlightenments_control.nested_flush_hypercall)
159-
vp_ap->nested_control.features.directhypercall = 1;
160-
vp_ap->current_nested_vmcs = phys_addr;
161-
vp_ap->enlighten_vmentry = 1;
162-
}
163-
164-
void evmcs_sanitize_exec_ctrls(struct vmcs_config *vmcs_conf);
165-
#else /* !IS_ENABLED(CONFIG_HYPERV) */
166-
static __always_inline bool kvm_is_using_evmcs(void) { return false; }
167-
static __always_inline void evmcs_write64(unsigned long field, u64 value) {}
168-
static __always_inline void evmcs_write32(unsigned long field, u32 value) {}
169-
static __always_inline void evmcs_write16(unsigned long field, u16 value) {}
170-
static __always_inline u64 evmcs_read64(unsigned long field) { return 0; }
171-
static __always_inline u32 evmcs_read32(unsigned long field) { return 0; }
172-
static __always_inline u16 evmcs_read16(unsigned long field) { return 0; }
173-
static inline void evmcs_load(u64 phys_addr) {}
174-
#endif /* IS_ENABLED(CONFIG_HYPERV) */
175-
176169
#define EVMPTR_INVALID (-1ULL)
177170
#define EVMPTR_MAP_PENDING (-2ULL)
178171

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