@@ -934,11 +934,11 @@ static inline void kvmppc_set_vsr_dword(struct kvm_vcpu *vcpu,
934934 return ;
935935
936936 if (index >= 32 ) {
937- val . vval = VCPU_VSX_VR (vcpu , index - 32 );
937+ kvmppc_get_vsx_vr (vcpu , index - 32 , & val . vval );
938938 val .vsxval [offset ] = gpr ;
939- VCPU_VSX_VR (vcpu , index - 32 ) = val .vval ;
939+ kvmppc_set_vsx_vr (vcpu , index - 32 , & val .vval ) ;
940940 } else {
941- VCPU_VSX_FPR (vcpu , index , offset ) = gpr ;
941+ kvmppc_set_vsx_fpr (vcpu , index , offset , gpr ) ;
942942 }
943943}
944944
@@ -949,13 +949,13 @@ static inline void kvmppc_set_vsr_dword_dump(struct kvm_vcpu *vcpu,
949949 int index = vcpu -> arch .io_gpr & KVM_MMIO_REG_MASK ;
950950
951951 if (index >= 32 ) {
952- val . vval = VCPU_VSX_VR (vcpu , index - 32 );
952+ kvmppc_get_vsx_vr (vcpu , index - 32 , & val . vval );
953953 val .vsxval [0 ] = gpr ;
954954 val .vsxval [1 ] = gpr ;
955- VCPU_VSX_VR (vcpu , index - 32 ) = val .vval ;
955+ kvmppc_set_vsx_vr (vcpu , index - 32 , & val .vval ) ;
956956 } else {
957- VCPU_VSX_FPR (vcpu , index , 0 ) = gpr ;
958- VCPU_VSX_FPR (vcpu , index , 1 ) = gpr ;
957+ kvmppc_set_vsx_fpr (vcpu , index , 0 , gpr ) ;
958+ kvmppc_set_vsx_fpr (vcpu , index , 1 , gpr ) ;
959959 }
960960}
961961
@@ -970,12 +970,12 @@ static inline void kvmppc_set_vsr_word_dump(struct kvm_vcpu *vcpu,
970970 val .vsx32val [1 ] = gpr ;
971971 val .vsx32val [2 ] = gpr ;
972972 val .vsx32val [3 ] = gpr ;
973- VCPU_VSX_VR (vcpu , index - 32 ) = val .vval ;
973+ kvmppc_set_vsx_vr (vcpu , index - 32 , & val .vval ) ;
974974 } else {
975975 val .vsx32val [0 ] = gpr ;
976976 val .vsx32val [1 ] = gpr ;
977- VCPU_VSX_FPR (vcpu , index , 0 ) = val .vsxval [0 ];
978- VCPU_VSX_FPR (vcpu , index , 1 ) = val .vsxval [0 ];
977+ kvmppc_set_vsx_fpr (vcpu , index , 0 , val .vsxval [0 ]) ;
978+ kvmppc_set_vsx_fpr (vcpu , index , 1 , val .vsxval [0 ]) ;
979979 }
980980}
981981
@@ -991,15 +991,15 @@ static inline void kvmppc_set_vsr_word(struct kvm_vcpu *vcpu,
991991 return ;
992992
993993 if (index >= 32 ) {
994- val . vval = VCPU_VSX_VR (vcpu , index - 32 );
994+ kvmppc_get_vsx_vr (vcpu , index - 32 , & val . vval );
995995 val .vsx32val [offset ] = gpr32 ;
996- VCPU_VSX_VR (vcpu , index - 32 ) = val .vval ;
996+ kvmppc_set_vsx_vr (vcpu , index - 32 , & val .vval ) ;
997997 } else {
998998 dword_offset = offset / 2 ;
999999 word_offset = offset % 2 ;
1000- val .vsxval [0 ] = VCPU_VSX_FPR (vcpu , index , dword_offset );
1000+ val .vsxval [0 ] = kvmppc_get_vsx_fpr (vcpu , index , dword_offset );
10011001 val .vsx32val [word_offset ] = gpr32 ;
1002- VCPU_VSX_FPR (vcpu , index , dword_offset ) = val .vsxval [0 ];
1002+ kvmppc_set_vsx_fpr (vcpu , index , dword_offset , val .vsxval [0 ]) ;
10031003 }
10041004}
10051005#endif /* CONFIG_VSX */
@@ -1058,9 +1058,9 @@ static inline void kvmppc_set_vmx_dword(struct kvm_vcpu *vcpu,
10581058 if (offset == -1 )
10591059 return ;
10601060
1061- val . vval = VCPU_VSX_VR (vcpu , index );
1061+ kvmppc_get_vsx_vr (vcpu , index , & val . vval );
10621062 val .vsxval [offset ] = gpr ;
1063- VCPU_VSX_VR (vcpu , index ) = val .vval ;
1063+ kvmppc_set_vsx_vr (vcpu , index , & val .vval ) ;
10641064}
10651065
10661066static inline void kvmppc_set_vmx_word (struct kvm_vcpu * vcpu ,
@@ -1074,9 +1074,9 @@ static inline void kvmppc_set_vmx_word(struct kvm_vcpu *vcpu,
10741074 if (offset == -1 )
10751075 return ;
10761076
1077- val . vval = VCPU_VSX_VR (vcpu , index );
1077+ kvmppc_get_vsx_vr (vcpu , index , & val . vval );
10781078 val .vsx32val [offset ] = gpr32 ;
1079- VCPU_VSX_VR (vcpu , index ) = val .vval ;
1079+ kvmppc_set_vsx_vr (vcpu , index , & val .vval ) ;
10801080}
10811081
10821082static inline void kvmppc_set_vmx_hword (struct kvm_vcpu * vcpu ,
@@ -1090,9 +1090,9 @@ static inline void kvmppc_set_vmx_hword(struct kvm_vcpu *vcpu,
10901090 if (offset == -1 )
10911091 return ;
10921092
1093- val . vval = VCPU_VSX_VR (vcpu , index );
1093+ kvmppc_get_vsx_vr (vcpu , index , & val . vval );
10941094 val .vsx16val [offset ] = gpr16 ;
1095- VCPU_VSX_VR (vcpu , index ) = val .vval ;
1095+ kvmppc_set_vsx_vr (vcpu , index , & val .vval ) ;
10961096}
10971097
10981098static inline void kvmppc_set_vmx_byte (struct kvm_vcpu * vcpu ,
@@ -1106,9 +1106,9 @@ static inline void kvmppc_set_vmx_byte(struct kvm_vcpu *vcpu,
11061106 if (offset == -1 )
11071107 return ;
11081108
1109- val . vval = VCPU_VSX_VR (vcpu , index );
1109+ kvmppc_get_vsx_vr (vcpu , index , & val . vval );
11101110 val .vsx8val [offset ] = gpr8 ;
1111- VCPU_VSX_VR (vcpu , index ) = val .vval ;
1111+ kvmppc_set_vsx_vr (vcpu , index , & val .vval ) ;
11121112}
11131113#endif /* CONFIG_ALTIVEC */
11141114
@@ -1194,14 +1194,14 @@ static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu)
11941194 if (vcpu -> kvm -> arch .kvm_ops -> giveup_ext )
11951195 vcpu -> kvm -> arch .kvm_ops -> giveup_ext (vcpu , MSR_FP );
11961196
1197- VCPU_FPR (vcpu , vcpu -> arch .io_gpr & KVM_MMIO_REG_MASK ) = gpr ;
1197+ kvmppc_set_fpr (vcpu , vcpu -> arch .io_gpr & KVM_MMIO_REG_MASK , gpr ) ;
11981198 break ;
11991199#ifdef CONFIG_PPC_BOOK3S
12001200 case KVM_MMIO_REG_QPR :
12011201 vcpu -> arch .qpr [vcpu -> arch .io_gpr & KVM_MMIO_REG_MASK ] = gpr ;
12021202 break ;
12031203 case KVM_MMIO_REG_FQPR :
1204- VCPU_FPR (vcpu , vcpu -> arch .io_gpr & KVM_MMIO_REG_MASK ) = gpr ;
1204+ kvmppc_set_fpr (vcpu , vcpu -> arch .io_gpr & KVM_MMIO_REG_MASK , gpr ) ;
12051205 vcpu -> arch .qpr [vcpu -> arch .io_gpr & KVM_MMIO_REG_MASK ] = gpr ;
12061206 break ;
12071207#endif
@@ -1419,9 +1419,9 @@ static inline int kvmppc_get_vsr_data(struct kvm_vcpu *vcpu, int rs, u64 *val)
14191419 }
14201420
14211421 if (rs < 32 ) {
1422- * val = VCPU_VSX_FPR (vcpu , rs , vsx_offset );
1422+ * val = kvmppc_get_vsx_fpr (vcpu , rs , vsx_offset );
14231423 } else {
1424- reg . vval = VCPU_VSX_VR (vcpu , rs - 32 );
1424+ kvmppc_get_vsx_vr (vcpu , rs - 32 , & reg . vval );
14251425 * val = reg .vsxval [vsx_offset ];
14261426 }
14271427 break ;
@@ -1438,10 +1438,10 @@ static inline int kvmppc_get_vsr_data(struct kvm_vcpu *vcpu, int rs, u64 *val)
14381438 if (rs < 32 ) {
14391439 dword_offset = vsx_offset / 2 ;
14401440 word_offset = vsx_offset % 2 ;
1441- reg .vsxval [0 ] = VCPU_VSX_FPR (vcpu , rs , dword_offset );
1441+ reg .vsxval [0 ] = kvmppc_get_vsx_fpr (vcpu , rs , dword_offset );
14421442 * val = reg .vsx32val [word_offset ];
14431443 } else {
1444- reg . vval = VCPU_VSX_VR (vcpu , rs - 32 );
1444+ kvmppc_get_vsx_vr (vcpu , rs - 32 , & reg . vval );
14451445 * val = reg .vsx32val [vsx_offset ];
14461446 }
14471447 break ;
@@ -1556,7 +1556,7 @@ static int kvmppc_get_vmx_dword(struct kvm_vcpu *vcpu, int index, u64 *val)
15561556 if (vmx_offset == -1 )
15571557 return -1 ;
15581558
1559- reg . vval = VCPU_VSX_VR (vcpu , index );
1559+ kvmppc_get_vsx_vr (vcpu , index , & reg . vval );
15601560 * val = reg .vsxval [vmx_offset ];
15611561
15621562 return result ;
@@ -1574,7 +1574,7 @@ static int kvmppc_get_vmx_word(struct kvm_vcpu *vcpu, int index, u64 *val)
15741574 if (vmx_offset == -1 )
15751575 return -1 ;
15761576
1577- reg . vval = VCPU_VSX_VR (vcpu , index );
1577+ kvmppc_get_vsx_vr (vcpu , index , & reg . vval );
15781578 * val = reg .vsx32val [vmx_offset ];
15791579
15801580 return result ;
@@ -1592,7 +1592,7 @@ static int kvmppc_get_vmx_hword(struct kvm_vcpu *vcpu, int index, u64 *val)
15921592 if (vmx_offset == -1 )
15931593 return -1 ;
15941594
1595- reg . vval = VCPU_VSX_VR (vcpu , index );
1595+ kvmppc_get_vsx_vr (vcpu , index , & reg . vval );
15961596 * val = reg .vsx16val [vmx_offset ];
15971597
15981598 return result ;
@@ -1610,7 +1610,7 @@ static int kvmppc_get_vmx_byte(struct kvm_vcpu *vcpu, int index, u64 *val)
16101610 if (vmx_offset == -1 )
16111611 return -1 ;
16121612
1613- reg . vval = VCPU_VSX_VR (vcpu , index );
1613+ kvmppc_get_vsx_vr (vcpu , index , & reg . vval );
16141614 * val = reg .vsx8val [vmx_offset ];
16151615
16161616 return result ;
@@ -1719,14 +1719,14 @@ int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
17191719 r = - ENXIO ;
17201720 break ;
17211721 }
1722- val . vval = vcpu -> arch . vr . vr [ reg -> id - KVM_REG_PPC_VR0 ] ;
1722+ kvmppc_get_vsx_vr ( vcpu , reg -> id - KVM_REG_PPC_VR0 , & val . vval ) ;
17231723 break ;
17241724 case KVM_REG_PPC_VSCR :
17251725 if (!cpu_has_feature (CPU_FTR_ALTIVEC )) {
17261726 r = - ENXIO ;
17271727 break ;
17281728 }
1729- val = get_reg_val (reg -> id , vcpu -> arch . vr . vscr . u [ 3 ] );
1729+ val = get_reg_val (reg -> id , kvmppc_get_vscr ( vcpu ) );
17301730 break ;
17311731 case KVM_REG_PPC_VRSAVE :
17321732 val = get_reg_val (reg -> id , vcpu -> arch .vrsave );
@@ -1770,14 +1770,14 @@ int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
17701770 r = - ENXIO ;
17711771 break ;
17721772 }
1773- vcpu -> arch . vr . vr [ reg -> id - KVM_REG_PPC_VR0 ] = val .vval ;
1773+ kvmppc_set_vsx_vr ( vcpu , reg -> id - KVM_REG_PPC_VR0 , & val .vval ) ;
17741774 break ;
17751775 case KVM_REG_PPC_VSCR :
17761776 if (!cpu_has_feature (CPU_FTR_ALTIVEC )) {
17771777 r = - ENXIO ;
17781778 break ;
17791779 }
1780- vcpu -> arch . vr . vscr . u [ 3 ] = set_reg_val (reg -> id , val );
1780+ kvmppc_set_vscr ( vcpu , set_reg_val (reg -> id , val ) );
17811781 break ;
17821782 case KVM_REG_PPC_VRSAVE :
17831783 if (!cpu_has_feature (CPU_FTR_ALTIVEC )) {
0 commit comments