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KVM: x86/pmu: Rename global_ovf_ctrl_mask to global_status_mask
Rename global_ovf_ctrl_mask to global_status_mask to avoid confusion now that Intel has renamed GLOBAL_OVF_CTRL to GLOBAL_STATUS_RESET in PMU v4. GLOBAL_OVF_CTRL and GLOBAL_STATUS_RESET are the same MSR index, i.e. are just different names for the same thing, but the SDM provides different entries in the IA-32 Architectural MSRs table, which gets really confusing when looking at PMU v4 definitions since it *looks* like GLOBAL_STATUS has bits that don't exist in GLOBAL_OVF_CTRL, but in reality the bits are simply defined in the GLOBAL_STATUS_RESET entry. No functional change intended. Cc: Like Xu <like.xu.linux@gmail.com> Link: https://lore.kernel.org/r/20230603011058.1038821-2-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
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2 files changed

Lines changed: 15 additions & 5 deletions

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arch/x86/include/asm/kvm_host.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -523,7 +523,7 @@ struct kvm_pmu {
523523
u64 global_status;
524524
u64 counter_bitmask[2];
525525
u64 global_ctrl_mask;
526-
u64 global_ovf_ctrl_mask;
526+
u64 global_status_mask;
527527
u64 reserved_bits;
528528
u64 raw_event_mask;
529529
struct kvm_pmc gp_counters[KVM_INTEL_PMC_MAX_GENERIC];

arch/x86/kvm/vmx/pmu_intel.c

Lines changed: 14 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -427,7 +427,11 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
427427
}
428428
break;
429429
case MSR_CORE_PERF_GLOBAL_OVF_CTRL:
430-
if (data & pmu->global_ovf_ctrl_mask)
430+
/*
431+
* GLOBAL_OVF_CTRL, a.k.a. GLOBAL STATUS_RESET, clears bits in
432+
* GLOBAL_STATUS, and so the set of reserved bits is the same.
433+
*/
434+
if (data & pmu->global_status_mask)
431435
return 1;
432436

433437
if (!msr_info->host_initiated)
@@ -531,7 +535,7 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
531535
pmu->reserved_bits = 0xffffffff00200000ull;
532536
pmu->raw_event_mask = X86_RAW_EVENT_MASK;
533537
pmu->global_ctrl_mask = ~0ull;
534-
pmu->global_ovf_ctrl_mask = ~0ull;
538+
pmu->global_status_mask = ~0ull;
535539
pmu->fixed_ctr_ctrl_mask = ~0ull;
536540
pmu->pebs_enable_mask = ~0ull;
537541
pmu->pebs_data_cfg_mask = ~0ull;
@@ -585,11 +589,17 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
585589
counter_mask = ~(((1ull << pmu->nr_arch_gp_counters) - 1) |
586590
(((1ull << pmu->nr_arch_fixed_counters) - 1) << INTEL_PMC_IDX_FIXED));
587591
pmu->global_ctrl_mask = counter_mask;
588-
pmu->global_ovf_ctrl_mask = pmu->global_ctrl_mask
592+
593+
/*
594+
* GLOBAL_STATUS and GLOBAL_OVF_CONTROL (a.k.a. GLOBAL_STATUS_RESET)
595+
* share reserved bit definitions. The kernel just happens to use
596+
* OVF_CTRL for the names.
597+
*/
598+
pmu->global_status_mask = pmu->global_ctrl_mask
589599
& ~(MSR_CORE_PERF_GLOBAL_OVF_CTRL_OVF_BUF |
590600
MSR_CORE_PERF_GLOBAL_OVF_CTRL_COND_CHGD);
591601
if (vmx_pt_mode_is_host_guest())
592-
pmu->global_ovf_ctrl_mask &=
602+
pmu->global_status_mask &=
593603
~MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI;
594604

595605
entry = kvm_find_cpuid_entry_index(vcpu, 7, 0);

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