@@ -30,9 +30,6 @@ struct regmap_irq_chip_data {
3030 int irq ;
3131 int wake_count ;
3232
33- unsigned int mask_base ;
34- unsigned int unmask_base ;
35-
3633 void * status_reg_buf ;
3734 unsigned int * main_status_buf ;
3835 unsigned int * status_buf ;
@@ -113,24 +110,22 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
113110 * suppress pointless writes.
114111 */
115112 for (i = 0 ; i < d -> chip -> num_regs ; i ++ ) {
116- if (d -> mask_base ) {
117- if (d -> chip -> handle_mask_sync )
118- d -> chip -> handle_mask_sync (i , d -> mask_buf_def [i ],
119- d -> mask_buf [i ],
120- d -> chip -> irq_drv_data );
121- else {
122- reg = d -> get_irq_reg (d , d -> mask_base , i );
123- ret = regmap_update_bits (d -> map , reg ,
124- d -> mask_buf_def [i ],
125- d -> mask_buf [i ]);
126- if (ret )
127- dev_err (d -> map -> dev , "Failed to sync masks in %x\n" ,
128- reg );
129- }
113+ if (d -> chip -> handle_mask_sync )
114+ d -> chip -> handle_mask_sync (i , d -> mask_buf_def [i ],
115+ d -> mask_buf [i ],
116+ d -> chip -> irq_drv_data );
117+
118+ if (d -> chip -> mask_base && !d -> chip -> handle_mask_sync ) {
119+ reg = d -> get_irq_reg (d , d -> chip -> mask_base , i );
120+ ret = regmap_update_bits (d -> map , reg ,
121+ d -> mask_buf_def [i ],
122+ d -> mask_buf [i ]);
123+ if (ret )
124+ dev_err (d -> map -> dev , "Failed to sync masks in %x\n" , reg );
130125 }
131126
132- if (d -> unmask_base ) {
133- reg = d -> get_irq_reg (d , d -> unmask_base , i );
127+ if (d -> chip -> unmask_base && ! d -> chip -> handle_mask_sync ) {
128+ reg = d -> get_irq_reg (d , d -> chip -> unmask_base , i );
134129 ret = regmap_update_bits (d -> map , reg ,
135130 d -> mask_buf_def [i ], ~d -> mask_buf [i ]);
136131 if (ret )
@@ -181,20 +176,6 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
181176 }
182177 }
183178
184- /* Don't update the type bits if we're using mask bits for irq type. */
185- if (!d -> chip -> type_in_mask ) {
186- for (i = 0 ; i < d -> chip -> num_type_reg ; i ++ ) {
187- if (!d -> type_buf_def [i ])
188- continue ;
189- reg = d -> get_irq_reg (d , d -> chip -> type_base , i );
190- ret = regmap_update_bits (d -> map , reg ,
191- d -> type_buf_def [i ], d -> type_buf [i ]);
192- if (ret != 0 )
193- dev_err (d -> map -> dev , "Failed to sync type in %x\n" ,
194- reg );
195- }
196- }
197-
198179 for (i = 0 ; i < d -> chip -> num_config_bases ; i ++ ) {
199180 for (j = 0 ; j < d -> chip -> num_config_regs ; j ++ ) {
200181 reg = d -> get_irq_reg (d , d -> chip -> config_base [i ], j );
@@ -273,36 +254,11 @@ static int regmap_irq_set_type(struct irq_data *data, unsigned int type)
273254
274255 reg = t -> type_reg_offset / map -> reg_stride ;
275256
276- if (t -> type_reg_mask )
277- d -> type_buf [reg ] &= ~t -> type_reg_mask ;
278- else
279- d -> type_buf [reg ] &= ~(t -> type_falling_val |
280- t -> type_rising_val |
281- t -> type_level_low_val |
282- t -> type_level_high_val );
283- switch (type ) {
284- case IRQ_TYPE_EDGE_FALLING :
285- d -> type_buf [reg ] |= t -> type_falling_val ;
286- break ;
287-
288- case IRQ_TYPE_EDGE_RISING :
289- d -> type_buf [reg ] |= t -> type_rising_val ;
290- break ;
291-
292- case IRQ_TYPE_EDGE_BOTH :
293- d -> type_buf [reg ] |= (t -> type_falling_val |
294- t -> type_rising_val );
295- break ;
296-
297- case IRQ_TYPE_LEVEL_HIGH :
298- d -> type_buf [reg ] |= t -> type_level_high_val ;
299- break ;
300-
301- case IRQ_TYPE_LEVEL_LOW :
302- d -> type_buf [reg ] |= t -> type_level_low_val ;
303- break ;
304- default :
305- return - EINVAL ;
257+ if (d -> chip -> type_in_mask ) {
258+ ret = regmap_irq_set_type_config_simple (& d -> type_buf , type ,
259+ irq_data , reg , d -> chip -> irq_drv_data );
260+ if (ret )
261+ return ret ;
306262 }
307263
308264 if (d -> chip -> set_type_config ) {
@@ -367,15 +323,8 @@ static inline int read_sub_irq_data(struct regmap_irq_chip_data *data,
367323 unsigned int offset = subreg -> offset [i ];
368324 unsigned int index = offset / map -> reg_stride ;
369325
370- if (chip -> not_fixed_stride )
371- ret = regmap_read (map ,
372- chip -> status_base + offset ,
373- & data -> status_buf [b ]);
374- else
375- ret = regmap_read (map ,
376- chip -> status_base + offset ,
377- & data -> status_buf [index ]);
378-
326+ ret = regmap_read (map , chip -> status_base + offset ,
327+ & data -> status_buf [index ]);
379328 if (ret )
380329 break ;
381330 }
@@ -430,17 +379,7 @@ static irqreturn_t regmap_irq_thread(int irq, void *d)
430379 * sake of simplicity. and add bulk reads only if needed
431380 */
432381 for (i = 0 ; i < chip -> num_main_regs ; i ++ ) {
433- /*
434- * For not_fixed_stride, don't use ->get_irq_reg().
435- * It would produce an incorrect result.
436- */
437- if (data -> chip -> not_fixed_stride )
438- reg = chip -> main_status +
439- i * map -> reg_stride * data -> irq_reg_stride ;
440- else
441- reg = data -> get_irq_reg (data ,
442- chip -> main_status , i );
443-
382+ reg = data -> get_irq_reg (data , chip -> main_status , i );
444383 ret = regmap_read (map , reg , & data -> main_status_buf [i ]);
445384 if (ret ) {
446385 dev_err (map -> dev ,
@@ -606,20 +545,8 @@ static const struct irq_domain_ops regmap_domain_ops = {
606545unsigned int regmap_irq_get_irq_reg_linear (struct regmap_irq_chip_data * data ,
607546 unsigned int base , int index )
608547{
609- const struct regmap_irq_chip * chip = data -> chip ;
610548 struct regmap * map = data -> map ;
611549
612- /*
613- * FIXME: This is for backward compatibility and should be removed
614- * when not_fixed_stride is dropped (it's only used by qcom-pm8008).
615- */
616- if (chip -> not_fixed_stride && chip -> sub_reg_offsets ) {
617- struct regmap_irq_sub_irq_map * subreg ;
618-
619- subreg = & chip -> sub_reg_offsets [0 ];
620- return base + subreg -> offset [0 ];
621- }
622-
623550 return base + index * map -> reg_stride * data -> irq_reg_stride ;
624551}
625552EXPORT_SYMBOL_GPL (regmap_irq_get_irq_reg_linear );
@@ -707,8 +634,6 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
707634 struct regmap_irq_chip_data * d ;
708635 int i ;
709636 int ret = - ENOMEM ;
710- int num_type_reg ;
711- int num_regs ;
712637 u32 reg ;
713638
714639 if (chip -> num_regs <= 0 )
@@ -717,6 +642,9 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
717642 if (chip -> clear_on_unmask && (chip -> ack_base || chip -> use_ack ))
718643 return - EINVAL ;
719644
645+ if (chip -> mask_base && chip -> unmask_base && !chip -> mask_unmask_non_inverted )
646+ return - EINVAL ;
647+
720648 for (i = 0 ; i < chip -> num_irqs ; i ++ ) {
721649 if (chip -> irqs [i ].reg_offset % map -> reg_stride )
722650 return - EINVAL ;
@@ -725,17 +653,6 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
725653 return - EINVAL ;
726654 }
727655
728- if (chip -> not_fixed_stride ) {
729- dev_warn (map -> dev , "not_fixed_stride is deprecated; use ->get_irq_reg() instead" );
730-
731- for (i = 0 ; i < chip -> num_regs ; i ++ )
732- if (chip -> sub_reg_offsets [i ].num_regs != 1 )
733- return - EINVAL ;
734- }
735-
736- if (chip -> num_type_reg )
737- dev_warn (map -> dev , "type registers are deprecated; use config registers instead" );
738-
739656 if (irq_base ) {
740657 irq_base = irq_alloc_descs (irq_base , 0 , chip -> num_irqs , 0 );
741658 if (irq_base < 0 ) {
@@ -780,21 +697,13 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
780697 goto err_alloc ;
781698 }
782699
783- /*
784- * Use num_config_regs if defined, otherwise fall back to num_type_reg
785- * to maintain backward compatibility.
786- */
787- num_type_reg = chip -> num_config_regs ? chip -> num_config_regs
788- : chip -> num_type_reg ;
789- num_regs = chip -> type_in_mask ? chip -> num_regs : num_type_reg ;
790- if (num_regs ) {
791- d -> type_buf_def = kcalloc (num_regs ,
700+ if (chip -> type_in_mask ) {
701+ d -> type_buf_def = kcalloc (chip -> num_regs ,
792702 sizeof (* d -> type_buf_def ), GFP_KERNEL );
793703 if (!d -> type_buf_def )
794704 goto err_alloc ;
795705
796- d -> type_buf = kcalloc (num_regs , sizeof (* d -> type_buf ),
797- GFP_KERNEL );
706+ d -> type_buf = kcalloc (chip -> num_regs , sizeof (* d -> type_buf ), GFP_KERNEL );
798707 if (!d -> type_buf )
799708 goto err_alloc ;
800709 }
@@ -824,28 +733,6 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
824733 d -> chip = chip ;
825734 d -> irq_base = irq_base ;
826735
827- if (chip -> mask_base && chip -> unmask_base &&
828- !chip -> mask_unmask_non_inverted ) {
829- /*
830- * Chips that specify both mask_base and unmask_base used to
831- * get inverted mask behavior by default, with no way to ask
832- * for the normal, non-inverted behavior. This "inverted by
833- * default" behavior is deprecated, but we have to support it
834- * until existing drivers have been fixed.
835- *
836- * Existing drivers should be updated by swapping mask_base
837- * and unmask_base and setting mask_unmask_non_inverted=true.
838- * New drivers should always set the flag.
839- */
840- dev_warn (map -> dev , "mask_base and unmask_base are inverted, please fix it" );
841-
842- d -> mask_base = chip -> unmask_base ;
843- d -> unmask_base = chip -> mask_base ;
844- } else {
845- d -> mask_base = chip -> mask_base ;
846- d -> unmask_base = chip -> unmask_base ;
847- }
848-
849736 if (chip -> irq_reg_stride )
850737 d -> irq_reg_stride = chip -> irq_reg_stride ;
851738 else
@@ -874,29 +761,28 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
874761 for (i = 0 ; i < chip -> num_regs ; i ++ ) {
875762 d -> mask_buf [i ] = d -> mask_buf_def [i ];
876763
877- if (d -> mask_base ) {
878- if (chip -> handle_mask_sync ) {
879- ret = chip -> handle_mask_sync (i ,
880- d -> mask_buf_def [i ],
881- d -> mask_buf [i ],
882- chip -> irq_drv_data );
883- if (ret )
884- goto err_alloc ;
885- } else {
886- reg = d -> get_irq_reg (d , d -> mask_base , i );
887- ret = regmap_update_bits (d -> map , reg ,
888- d -> mask_buf_def [i ],
889- d -> mask_buf [i ]);
890- if (ret ) {
891- dev_err (map -> dev , "Failed to set masks in 0x%x: %d\n" ,
892- reg , ret );
893- goto err_alloc ;
894- }
764+ if (chip -> handle_mask_sync ) {
765+ ret = chip -> handle_mask_sync (i , d -> mask_buf_def [i ],
766+ d -> mask_buf [i ],
767+ chip -> irq_drv_data );
768+ if (ret )
769+ goto err_alloc ;
770+ }
771+
772+ if (chip -> mask_base && !chip -> handle_mask_sync ) {
773+ reg = d -> get_irq_reg (d , chip -> mask_base , i );
774+ ret = regmap_update_bits (d -> map , reg ,
775+ d -> mask_buf_def [i ],
776+ d -> mask_buf [i ]);
777+ if (ret ) {
778+ dev_err (map -> dev , "Failed to set masks in 0x%x: %d\n" ,
779+ reg , ret );
780+ goto err_alloc ;
895781 }
896782 }
897783
898- if (d -> unmask_base ) {
899- reg = d -> get_irq_reg (d , d -> unmask_base , i );
784+ if (chip -> unmask_base && ! chip -> handle_mask_sync ) {
785+ reg = d -> get_irq_reg (d , chip -> unmask_base , i );
900786 ret = regmap_update_bits (d -> map , reg ,
901787 d -> mask_buf_def [i ], ~d -> mask_buf [i ]);
902788 if (ret ) {
@@ -970,20 +856,6 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
970856 }
971857 }
972858
973- if (chip -> num_type_reg && !chip -> type_in_mask ) {
974- for (i = 0 ; i < chip -> num_type_reg ; ++ i ) {
975- reg = d -> get_irq_reg (d , d -> chip -> type_base , i );
976-
977- ret = regmap_read (map , reg , & d -> type_buf_def [i ]);
978-
979- if (ret ) {
980- dev_err (map -> dev , "Failed to get type defaults at 0x%x: %d\n" ,
981- reg , ret );
982- goto err_alloc ;
983- }
984- }
985- }
986-
987859 if (irq_base )
988860 d -> domain = irq_domain_create_legacy (fwnode , chip -> num_irqs ,
989861 irq_base , 0 ,
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