Skip to content

Commit 53d4d31

Browse files
rafaeljwrafaeljw
committed
Merge branch 'pm-cpufreq'
Merge cpufreq fixes and cleanups, mostly on top of those fixes, for 6.18-rc1: - Make cpufreq drivers setting the default CPU transition latency to CPUFREQ_ETERNAL specify a proper default transition latency value instead which addresses a regression introduced during the 6.6 cycle that broke CPUFREQ_ETERNAL handling (Rafael Wysocki) - Make the cpufreq CPPC driver use a proper transition delay value when CPUFREQ_ETERNAL is returned by cppc_get_transition_latency() to indicate an error condition (Rafael Wysocki) - Make cppc_get_transition_latency() return a negative error code to indicate error conditions instead of using CPUFREQ_ETERNAL for this purpose and drop CPUFREQ_ETERNAL that has no other users (Rafael Wysocki, Gopi Krishna Menon) - Fix device leak in the mediatek cpufreq driver (Johan Hovold) - Set target frequency on all CPUs sharing a policy during frequency updates in the tegra186 cpufreq driver and make it initialize all cores to max frequencies (Aaron Kling) - Rust cpufreq helper cleanup (Thorsten Blum) * pm-cpufreq: docs/zh_CN: Fix malformed table docs/zh_TW: Fix malformed table cpufreq: Drop unused symbol CPUFREQ_ETERNAL ACPI: CPPC: Do not use CPUFREQ_ETERNAL as an error value cpufreq: CPPC: Avoid using CPUFREQ_ETERNAL as transition delay cpufreq: Make drivers using CPUFREQ_ETERNAL specify transition latency cpufreq: tegra186: Initialize all cores to max frequencies cpufreq: tegra186: Set target frequency for all cpus in policy rust: cpufreq: streamline find_supply_names cpufreq: mediatek: fix device leak on probe failure
2 parents 05f084d + 7e8f305 commit 53d4d31

19 files changed

Lines changed: 83 additions & 60 deletions

File tree

‎Documentation/admin-guide/pm/cpufreq.rst‎

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -274,10 +274,6 @@ are the following:
274274
The time it takes to switch the CPUs belonging to this policy from one
275275
P-state to another, in nanoseconds.
276276

277-
If unknown or if known to be so high that the scaling driver does not
278-
work with the `ondemand`_ governor, -1 (:c:macro:`CPUFREQ_ETERNAL`)
279-
will be returned by reads from this attribute.
280-
281277
``related_cpus``
282278
List of all (online and offline) CPUs belonging to this policy.
283279

‎Documentation/cpu-freq/cpu-drivers.rst‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -109,8 +109,7 @@ Then, the driver must fill in the following values:
109109
+-----------------------------------+--------------------------------------+
110110
|policy->cpuinfo.transition_latency | the time it takes on this CPU to |
111111
| | switch between two frequencies in |
112-
| | nanoseconds (if appropriate, else |
113-
| | specify CPUFREQ_ETERNAL) |
112+
| | nanoseconds |
114113
+-----------------------------------+--------------------------------------+
115114
|policy->cur | The current operating frequency of |
116115
| | this CPU (if appropriate) |

‎Documentation/translations/zh_CN/cpu-freq/cpu-drivers.rst‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -112,8 +112,7 @@ CPUfreq核心层注册一个cpufreq_driver结构体。
112112
| | |
113113
+-----------------------------------+--------------------------------------+
114114
|policy->cpuinfo.transition_latency | CPU在两个频率之间切换所需的时间，以 |
115-
| | 纳秒为单位（如不适用，设定为 |
116-
| | CPUFREQ_ETERNAL） |
115+
| | 纳秒为单位 |
117116
| | |
118117
+-----------------------------------+--------------------------------------+
119118
|policy->cur | 该CPU当前的工作频率(如适用) |

‎Documentation/translations/zh_TW/cpu-freq/cpu-drivers.rst‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -112,8 +112,7 @@ CPUfreq核心層註冊一個cpufreq_driver結構體。
112112
| | |
113113
+-----------------------------------+--------------------------------------+
114114
|policy->cpuinfo.transition_latency | CPU在兩個頻率之間切換所需的時間，以 |
115-
| | 納秒爲單位（如不適用，設定爲 |
116-
| | CPUFREQ_ETERNAL） |
115+
| | 納秒爲單位 |
117116
| | |
118117
+-----------------------------------+--------------------------------------+
119118
|policy->cur | 該CPU當前的工作頻率(如適用) |

‎drivers/acpi/cppc_acpi.c‎

Lines changed: 7 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1876,7 +1876,7 @@ EXPORT_SYMBOL_GPL(cppc_set_perf);
18761876
* If desired_reg is in the SystemMemory or SystemIo ACPI address space,
18771877
* then assume there is no latency.
18781878
*/
1879-
unsigned int cppc_get_transition_latency(int cpu_num)
1879+
int cppc_get_transition_latency(int cpu_num)
18801880
{
18811881
/*
18821882
* Expected transition latency is based on the PCCT timing values
@@ -1889,31 +1889,29 @@ unsigned int cppc_get_transition_latency(int cpu_num)
18891889
* completion of a command before issuing the next command,
18901890
* in microseconds.
18911891
*/
1892-
unsigned int latency_ns = 0;
18931892
struct cpc_desc *cpc_desc;
18941893
struct cpc_register_resource *desired_reg;
18951894
int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpu_num);
18961895
struct cppc_pcc_data *pcc_ss_data;
1896+
int latency_ns = 0;
18971897

18981898
cpc_desc = per_cpu(cpc_desc_ptr, cpu_num);
18991899
if (!cpc_desc)
1900-
return CPUFREQ_ETERNAL;
1900+
return -ENODATA;
19011901

19021902
desired_reg = &cpc_desc->cpc_regs[DESIRED_PERF];
19031903
if (CPC_IN_SYSTEM_MEMORY(desired_reg) || CPC_IN_SYSTEM_IO(desired_reg))
19041904
return 0;
1905-
else if (!CPC_IN_PCC(desired_reg))
1906-
return CPUFREQ_ETERNAL;
19071905

1908-
if (pcc_ss_id < 0)
1909-
return CPUFREQ_ETERNAL;
1906+
if (!CPC_IN_PCC(desired_reg) || pcc_ss_id < 0)
1907+
return -ENODATA;
19101908

19111909
pcc_ss_data = pcc_data[pcc_ss_id];
19121910
if (pcc_ss_data->pcc_mpar)
19131911
latency_ns = 60 * (1000 * 1000 * 1000 / pcc_ss_data->pcc_mpar);
19141912

1915-
latency_ns = max(latency_ns, pcc_ss_data->pcc_nominal * 1000);
1916-
latency_ns = max(latency_ns, pcc_ss_data->pcc_mrtt * 1000);
1913+
latency_ns = max_t(int, latency_ns, pcc_ss_data->pcc_nominal * 1000);
1914+
latency_ns = max_t(int, latency_ns, pcc_ss_data->pcc_mrtt * 1000);
19171915

19181916
return latency_ns;
19191917
}

‎drivers/cpufreq/amd-pstate.c‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -872,10 +872,10 @@ static void amd_pstate_update_limits(struct cpufreq_policy *policy)
872872
*/
873873
static u32 amd_pstate_get_transition_delay_us(unsigned int cpu)
874874
{
875-
u32 transition_delay_ns;
875+
int transition_delay_ns;
876876

877877
transition_delay_ns = cppc_get_transition_latency(cpu);
878-
if (transition_delay_ns == CPUFREQ_ETERNAL) {
878+
if (transition_delay_ns < 0) {
879879
if (cpu_feature_enabled(X86_FEATURE_AMD_FAST_CPPC))
880880
return AMD_PSTATE_FAST_CPPC_TRANSITION_DELAY;
881881
else
@@ -891,10 +891,10 @@ static u32 amd_pstate_get_transition_delay_us(unsigned int cpu)
891891
*/
892892
static u32 amd_pstate_get_transition_latency(unsigned int cpu)
893893
{
894-
u32 transition_latency;
894+
int transition_latency;
895895

896896
transition_latency = cppc_get_transition_latency(cpu);
897-
if (transition_latency == CPUFREQ_ETERNAL)
897+
if (transition_latency < 0)
898898
return AMD_PSTATE_TRANSITION_LATENCY;
899899

900900
return transition_latency;

‎drivers/cpufreq/cppc_cpufreq.c‎

Lines changed: 12 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -308,6 +308,16 @@ static int cppc_verify_policy(struct cpufreq_policy_data *policy)
308308
return 0;
309309
}
310310

311+
static unsigned int __cppc_cpufreq_get_transition_delay_us(unsigned int cpu)
312+
{
313+
int transition_latency_ns = cppc_get_transition_latency(cpu);
314+
315+
if (transition_latency_ns < 0)
316+
return CPUFREQ_DEFAULT_TRANSITION_LATENCY_NS / NSEC_PER_USEC;
317+
318+
return transition_latency_ns / NSEC_PER_USEC;
319+
}
320+
311321
/*
312322
* The PCC subspace describes the rate at which platform can accept commands
313323
* on the shared PCC channel (including READs which do not count towards freq
@@ -330,12 +340,12 @@ static unsigned int cppc_cpufreq_get_transition_delay_us(unsigned int cpu)
330340
return 10000;
331341
}
332342
}
333-
return cppc_get_transition_latency(cpu) / NSEC_PER_USEC;
343+
return __cppc_cpufreq_get_transition_delay_us(cpu);
334344
}
335345
#else
336346
static unsigned int cppc_cpufreq_get_transition_delay_us(unsigned int cpu)
337347
{
338-
return cppc_get_transition_latency(cpu) / NSEC_PER_USEC;
348+
return __cppc_cpufreq_get_transition_delay_us(cpu);
339349
}
340350
#endif
341351

‎drivers/cpufreq/cpufreq-dt.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -104,7 +104,7 @@ static int cpufreq_init(struct cpufreq_policy *policy)
104104

105105
transition_latency = dev_pm_opp_get_max_transition_latency(cpu_dev);
106106
if (!transition_latency)
107-
transition_latency = CPUFREQ_ETERNAL;
107+
transition_latency = CPUFREQ_DEFAULT_TRANSITION_LATENCY_NS;
108108

109109
cpumask_copy(policy->cpus, priv->cpus);
110110
policy->driver_data = priv;

‎drivers/cpufreq/imx6q-cpufreq.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -442,7 +442,7 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev)
442442
}
443443

444444
if (of_property_read_u32(np, "clock-latency", &transition_latency))
445-
transition_latency = CPUFREQ_ETERNAL;
445+
transition_latency = CPUFREQ_DEFAULT_TRANSITION_LATENCY_NS;
446446

447447
/*
448448
* Calculate the ramp time for max voltage change in the

‎drivers/cpufreq/mediatek-cpufreq-hw.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -309,7 +309,7 @@ static int mtk_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
309309

310310
latency = readl_relaxed(data->reg_bases[REG_FREQ_LATENCY]) * 1000;
311311
if (!latency)
312-
latency = CPUFREQ_ETERNAL;
312+
latency = CPUFREQ_DEFAULT_TRANSITION_LATENCY_NS;
313313

314314
policy->cpuinfo.transition_latency = latency;
315315
policy->fast_switch_possible = true;

0 commit comments

Comments
 (0)