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KVM: selftests: Add a selftests for nested VMLOAD/VMSAVE
Add a test for VMLOAD/VMSAVE in an L2 guest. The test verifies that L1 intercepts for VMSAVE/VMLOAD always work regardless of VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK. Then, more interestingly, it makes sure that when L1 does not intercept VMLOAD/VMSAVE, they work as intended in L2. When VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK is enabled by L1, VMSAVE/VMLOAD from L2 should interpret the GPA as an L2 GPA and translate it through the NPT. When VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK is disabled by L1, VMSAVE/VMLOAD from L2 should interpret the GPA as an L1 GPA. To test this, put two VMCBs (0 and 1) in L1's physical address space, and have a single L2 GPA where: - L2 VMCB GPA == L1 VMCB(0) GPA - L2 VMCB GPA maps to L1 VMCB(1) via the NPT in L1. This setup allows detecting how the GPA is interpreted based on which L1 VMCB is actually accessed. In both cases, L2 sets KERNEL_GS_BASE (one of the fields handled by VMSAVE/VMLOAD), and executes VMSAVE to write its value to the VMCB. The test userspace code then checks that the write was made to the correct VMCB (based on whether VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK is set by L1), and writes a new value to that VMCB. L2 then executes VMLOAD to load the new value and makes sure it's reflected correctly in KERNERL_GS_BASE. Signed-off-by: Yosry Ahmed <yosry.ahmed@linux.dev> Link: https://patch.msgid.link/20260110004821.3411245-4-yosry.ahmed@linux.dev Signed-off-by: Sean Christopherson <seanjc@google.com>
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‎tools/testing/selftests/kvm/Makefile.kvm‎

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@@ -95,6 +95,7 @@ TEST_GEN_PROGS_x86 += x86/nested_exceptions_test
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TEST_GEN_PROGS_x86 += x86/nested_invalid_cr3_test
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TEST_GEN_PROGS_x86 += x86/nested_tsc_adjust_test
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TEST_GEN_PROGS_x86 += x86/nested_tsc_scaling_test
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TEST_GEN_PROGS_x86 += x86/nested_vmsave_vmload_test
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TEST_GEN_PROGS_x86 += x86/platform_info_test
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TEST_GEN_PROGS_x86 += x86/pmu_counters_test
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TEST_GEN_PROGS_x86 += x86/pmu_event_filter_test

‎tools/testing/selftests/kvm/include/x86/processor.h‎

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@@ -201,6 +201,7 @@ struct kvm_x86_cpu_feature {
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#define X86_FEATURE_TSCRATEMSR KVM_X86_CPU_FEATURE(0x8000000A, 0, EDX, 4)
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#define X86_FEATURE_PAUSEFILTER KVM_X86_CPU_FEATURE(0x8000000A, 0, EDX, 10)
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#define X86_FEATURE_PFTHRESHOLD KVM_X86_CPU_FEATURE(0x8000000A, 0, EDX, 12)
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#define X86_FEATURE_V_VMSAVE_VMLOAD KVM_X86_CPU_FEATURE(0x8000000A, 0, EDX, 15)
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#define X86_FEATURE_VGIF KVM_X86_CPU_FEATURE(0x8000000A, 0, EDX, 16)
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#define X86_FEATURE_IDLE_HLT KVM_X86_CPU_FEATURE(0x8000000A, 0, EDX, 30)
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#define X86_FEATURE_SEV KVM_X86_CPU_FEATURE(0x8000001F, 0, EAX, 1)

‎tools/testing/selftests/kvm/x86/nested_vmsave_vmload_test.c‎

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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2026, Google LLC.
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*/
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#include "kvm_util.h"
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#include "vmx.h"
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#include "svm_util.h"
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#include "kselftest.h"
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/*
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* Allocate two VMCB pages for testing. Both pages have different GVAs (shared
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* by both L1 and L2) and L1 GPAs. A single L2 GPA is used such that:
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* - L2 GPA == L1 GPA for VMCB0.
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* - L2 GPA is mapped to L1 GPA for VMCB1 using NPT in L1.
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*
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* This allows testing whether the GPA used by VMSAVE/VMLOAD in L2 is
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* interpreted as a direct L1 GPA or translated using NPT as an L2 GPA, depends
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* on which VMCB is accessed.
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*/
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#define TEST_MEM_SLOT_INDEX 1
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#define TEST_MEM_PAGES 2
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#define TEST_MEM_BASE 0xc0000000
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#define TEST_GUEST_ADDR(idx) (TEST_MEM_BASE + (idx) * PAGE_SIZE)
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#define TEST_VMCB_L1_GPA(idx) TEST_GUEST_ADDR(idx)
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#define TEST_VMCB_GVA(idx) TEST_GUEST_ADDR(idx)
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#define TEST_VMCB_L2_GPA TEST_VMCB_L1_GPA(0)
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#define L2_GUEST_STACK_SIZE 64
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static void l2_guest_code_vmsave(void)
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{
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asm volatile("vmsave %0" : : "a"(TEST_VMCB_L2_GPA) : "memory");
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}
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static void l2_guest_code_vmload(void)
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{
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asm volatile("vmload %0" : : "a"(TEST_VMCB_L2_GPA) : "memory");
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}
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static void l2_guest_code_vmcb(int vmcb_idx)
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{
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wrmsr(MSR_KERNEL_GS_BASE, 0xaaaa);
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l2_guest_code_vmsave();
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/* Verify the VMCB used by VMSAVE and update KERNEL_GS_BASE to 0xbbbb */
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GUEST_SYNC(vmcb_idx);
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l2_guest_code_vmload();
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GUEST_ASSERT_EQ(rdmsr(MSR_KERNEL_GS_BASE), 0xbbbb);
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/* Reset MSR_KERNEL_GS_BASE */
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wrmsr(MSR_KERNEL_GS_BASE, 0);
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l2_guest_code_vmsave();
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vmmcall();
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}
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static void l2_guest_code_vmcb0(void)
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{
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l2_guest_code_vmcb(0);
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}
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static void l2_guest_code_vmcb1(void)
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{
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l2_guest_code_vmcb(1);
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}
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static void l1_guest_code(struct svm_test_data *svm)
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{
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unsigned long l2_guest_stack[L2_GUEST_STACK_SIZE];
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/* Each test case initializes the guest RIP below */
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generic_svm_setup(svm, NULL, &l2_guest_stack[L2_GUEST_STACK_SIZE]);
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/* Set VMSAVE/VMLOAD intercepts and make sure they work with.. */
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svm->vmcb->control.intercept |= (BIT_ULL(INTERCEPT_VMSAVE) |
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BIT_ULL(INTERCEPT_VMLOAD));
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/* ..VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK cleared.. */
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svm->vmcb->control.virt_ext &= ~VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK;
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svm->vmcb->save.rip = (u64)l2_guest_code_vmsave;
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run_guest(svm->vmcb, svm->vmcb_gpa);
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GUEST_ASSERT_EQ(svm->vmcb->control.exit_code, SVM_EXIT_VMSAVE);
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svm->vmcb->save.rip = (u64)l2_guest_code_vmload;
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run_guest(svm->vmcb, svm->vmcb_gpa);
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GUEST_ASSERT_EQ(svm->vmcb->control.exit_code, SVM_EXIT_VMLOAD);
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/* ..and VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK set */
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svm->vmcb->control.virt_ext |= VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK;
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svm->vmcb->save.rip = (u64)l2_guest_code_vmsave;
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run_guest(svm->vmcb, svm->vmcb_gpa);
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GUEST_ASSERT_EQ(svm->vmcb->control.exit_code, SVM_EXIT_VMSAVE);
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svm->vmcb->save.rip = (u64)l2_guest_code_vmload;
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run_guest(svm->vmcb, svm->vmcb_gpa);
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GUEST_ASSERT_EQ(svm->vmcb->control.exit_code, SVM_EXIT_VMLOAD);
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/* Now clear the intercepts to test VMSAVE/VMLOAD behavior */
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svm->vmcb->control.intercept &= ~(BIT_ULL(INTERCEPT_VMSAVE) |
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BIT_ULL(INTERCEPT_VMLOAD));
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/*
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* Without VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK, the GPA will be
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* interpreted as an L1 GPA, so VMCB0 should be used.
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*/
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svm->vmcb->save.rip = (u64)l2_guest_code_vmcb0;
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svm->vmcb->control.virt_ext &= ~VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK;
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run_guest(svm->vmcb, svm->vmcb_gpa);
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GUEST_ASSERT_EQ(svm->vmcb->control.exit_code, SVM_EXIT_VMMCALL);
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/*
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* With VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK, the GPA will be interpeted as
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* an L2 GPA, and translated through the NPT to VMCB1.
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*/
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svm->vmcb->save.rip = (u64)l2_guest_code_vmcb1;
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svm->vmcb->control.virt_ext |= VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK;
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run_guest(svm->vmcb, svm->vmcb_gpa);
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GUEST_ASSERT_EQ(svm->vmcb->control.exit_code, SVM_EXIT_VMMCALL);
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GUEST_DONE();
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}
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int main(int argc, char *argv[])
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{
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vm_vaddr_t nested_gva = 0;
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struct vmcb *test_vmcb[2];
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struct kvm_vcpu *vcpu;
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struct kvm_vm *vm;
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int i;
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TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_SVM));
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TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_NPT));
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TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_V_VMSAVE_VMLOAD));
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vm = vm_create_with_one_vcpu(&vcpu, l1_guest_code);
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vm_enable_tdp(vm);
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vcpu_alloc_svm(vm, &nested_gva);
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vcpu_args_set(vcpu, 1, nested_gva);
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vm_userspace_mem_region_add(vm, VM_MEM_SRC_ANONYMOUS,
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TEST_MEM_BASE, TEST_MEM_SLOT_INDEX,
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TEST_MEM_PAGES, 0);
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for (i = 0; i <= 1; i++) {
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virt_map(vm, TEST_VMCB_GVA(i), TEST_VMCB_L1_GPA(i), 1);
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test_vmcb[i] = (struct vmcb *)addr_gva2hva(vm, TEST_VMCB_GVA(i));
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}
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tdp_identity_map_default_memslots(vm);
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/*
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* L2 GPA == L1_GPA(0), but map it to L1_GPA(1), to allow testing
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* whether the L2 GPA is interpreted as an L1 GPA or translated through
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* the NPT.
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*/
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TEST_ASSERT_EQ(TEST_VMCB_L2_GPA, TEST_VMCB_L1_GPA(0));
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tdp_map(vm, TEST_VMCB_L2_GPA, TEST_VMCB_L1_GPA(1), PAGE_SIZE);
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for (;;) {
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struct ucall uc;
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vcpu_run(vcpu);
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TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_IO);
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switch (get_ucall(vcpu, &uc)) {
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case UCALL_ABORT:
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REPORT_GUEST_ASSERT(uc);
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case UCALL_SYNC:
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i = uc.args[1];
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TEST_ASSERT(i == 0 || i == 1, "Unexpected VMCB idx: %d", i);
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/*
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* Check that only the expected VMCB has KERNEL_GS_BASE
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* set to 0xaaaa, and update it to 0xbbbb.
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*/
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TEST_ASSERT_EQ(test_vmcb[i]->save.kernel_gs_base, 0xaaaa);
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TEST_ASSERT_EQ(test_vmcb[1-i]->save.kernel_gs_base, 0);
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test_vmcb[i]->save.kernel_gs_base = 0xbbbb;
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break;
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case UCALL_DONE:
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goto done;
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default:
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TEST_FAIL("Unknown ucall %lu", uc.cmd);
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}
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}
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done:
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kvm_vm_free(vm);
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return 0;
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}

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