@@ -208,8 +208,6 @@ __setup("mac5380=", mac_scsi_setup);
208208 ".previous \n" \
209209 : "+a" (addr), "+r" (n), "+r" (result) : "a" (io))
210210
211- #define MAC_PDMA_DELAY 32
212-
213211static inline int mac_pdma_recv (void __iomem * io , unsigned char * start , int n )
214212{
215213 unsigned char * addr = start ;
@@ -274,6 +272,36 @@ static inline void write_ctrl_reg(struct NCR5380_hostdata *hostdata, u32 value)
274272 out_be32 (hostdata -> io + (CTRL_REG << 4 ), value );
275273}
276274
275+ static inline int macscsi_wait_for_drq (struct NCR5380_hostdata * hostdata )
276+ {
277+ unsigned int n = 1 ; /* effectively multiplies NCR5380_REG_POLL_TIME */
278+ unsigned char basr ;
279+
280+ again :
281+ basr = NCR5380_read (BUS_AND_STATUS_REG );
282+
283+ if (!(basr & BASR_PHASE_MATCH ))
284+ return 1 ;
285+
286+ if (basr & BASR_IRQ )
287+ return -1 ;
288+
289+ if (basr & BASR_DRQ )
290+ return 0 ;
291+
292+ if (n -- == 0 ) {
293+ NCR5380_dprint (NDEBUG_PSEUDO_DMA , hostdata -> host );
294+ dsprintk (NDEBUG_PSEUDO_DMA , hostdata -> host ,
295+ "%s: DRQ timeout\n" , __func__ );
296+ return -1 ;
297+ }
298+
299+ NCR5380_poll_politely2 (hostdata ,
300+ BUS_AND_STATUS_REG , BASR_DRQ , BASR_DRQ ,
301+ BUS_AND_STATUS_REG , BASR_PHASE_MATCH , 0 , 0 );
302+ goto again ;
303+ }
304+
277305static inline int macscsi_pread (struct NCR5380_hostdata * hostdata ,
278306 unsigned char * dst , int len )
279307{
@@ -283,9 +311,7 @@ static inline int macscsi_pread(struct NCR5380_hostdata *hostdata,
283311
284312 hostdata -> pdma_residual = len ;
285313
286- while (!NCR5380_poll_politely (hostdata , BUS_AND_STATUS_REG ,
287- BASR_DRQ | BASR_PHASE_MATCH ,
288- BASR_DRQ | BASR_PHASE_MATCH , 0 )) {
314+ while (macscsi_wait_for_drq (hostdata ) == 0 ) {
289315 int bytes , chunk_bytes ;
290316
291317 if (macintosh_config -> ident == MAC_MODEL_IIFX )
@@ -295,19 +321,16 @@ static inline int macscsi_pread(struct NCR5380_hostdata *hostdata,
295321 chunk_bytes = min (hostdata -> pdma_residual , 512 );
296322 bytes = mac_pdma_recv (s , d , chunk_bytes );
297323
324+ if (macintosh_config -> ident == MAC_MODEL_IIFX )
325+ write_ctrl_reg (hostdata , CTRL_INTERRUPTS_ENABLE );
326+
298327 if (bytes > 0 ) {
299328 d += bytes ;
300329 hostdata -> pdma_residual -= bytes ;
301330 }
302331
303332 if (hostdata -> pdma_residual == 0 )
304- goto out ;
305-
306- if (!(NCR5380_read (BUS_AND_STATUS_REG ) & BASR_PHASE_MATCH ))
307- goto out ;
308-
309- if (bytes == 0 )
310- udelay (MAC_PDMA_DELAY );
333+ break ;
311334
312335 if (bytes > 0 )
313336 continue ;
@@ -321,16 +344,9 @@ static inline int macscsi_pread(struct NCR5380_hostdata *hostdata,
321344 continue ;
322345
323346 result = -1 ;
324- goto out ;
347+ break ;
325348 }
326349
327- scmd_printk (KERN_ERR , hostdata -> connected ,
328- "%s: phase mismatch or !DRQ\n" , __func__ );
329- NCR5380_dprint (NDEBUG_PSEUDO_DMA , hostdata -> host );
330- result = -1 ;
331- out :
332- if (macintosh_config -> ident == MAC_MODEL_IIFX )
333- write_ctrl_reg (hostdata , CTRL_INTERRUPTS_ENABLE );
334350 return result ;
335351}
336352
@@ -343,9 +359,7 @@ static inline int macscsi_pwrite(struct NCR5380_hostdata *hostdata,
343359
344360 hostdata -> pdma_residual = len ;
345361
346- while (!NCR5380_poll_politely (hostdata , BUS_AND_STATUS_REG ,
347- BASR_DRQ | BASR_PHASE_MATCH ,
348- BASR_DRQ | BASR_PHASE_MATCH , 0 )) {
362+ while (macscsi_wait_for_drq (hostdata ) == 0 ) {
349363 int bytes , chunk_bytes ;
350364
351365 if (macintosh_config -> ident == MAC_MODEL_IIFX )
@@ -355,6 +369,9 @@ static inline int macscsi_pwrite(struct NCR5380_hostdata *hostdata,
355369 chunk_bytes = min (hostdata -> pdma_residual , 512 );
356370 bytes = mac_pdma_send (s , d , chunk_bytes );
357371
372+ if (macintosh_config -> ident == MAC_MODEL_IIFX )
373+ write_ctrl_reg (hostdata , CTRL_INTERRUPTS_ENABLE );
374+
358375 if (bytes > 0 ) {
359376 s += bytes ;
360377 hostdata -> pdma_residual -= bytes ;
@@ -369,15 +386,9 @@ static inline int macscsi_pwrite(struct NCR5380_hostdata *hostdata,
369386 "%s: Last Byte Sent timeout\n" , __func__ );
370387 result = -1 ;
371388 }
372- goto out ;
389+ break ;
373390 }
374391
375- if (!(NCR5380_read (BUS_AND_STATUS_REG ) & BASR_PHASE_MATCH ))
376- goto out ;
377-
378- if (bytes == 0 )
379- udelay (MAC_PDMA_DELAY );
380-
381392 if (bytes > 0 )
382393 continue ;
383394
@@ -390,16 +401,9 @@ static inline int macscsi_pwrite(struct NCR5380_hostdata *hostdata,
390401 continue ;
391402
392403 result = -1 ;
393- goto out ;
404+ break ;
394405 }
395406
396- scmd_printk (KERN_ERR , hostdata -> connected ,
397- "%s: phase mismatch or !DRQ\n" , __func__ );
398- NCR5380_dprint (NDEBUG_PSEUDO_DMA , hostdata -> host );
399- result = -1 ;
400- out :
401- if (macintosh_config -> ident == MAC_MODEL_IIFX )
402- write_ctrl_reg (hostdata , CTRL_INTERRUPTS_ENABLE );
403407 return result ;
404408}
405409
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