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Merge tag 'zynqmp-dt-for-6.8' of https://github.com/Xilinx/linux-xlnx into soc/dt
arm64: ZynqMP DT changes for 6.8 - Fix overlay rules to remove KR260 targets - Move ethernet phys to mdio node - Fix couple of issues reported by W=1 - Do not use _ in node names - Use lowercase in register address - Remove address/size-cells from nodes without child - Moved fixed clock to root on KV260 - Fix issues reported by dt-schema - additional compatible string for qspi on SOM - Move arm/xilinx.yaml to soc vendor to cover also other archs - Describe new Microblaze V qemu platform - Add missing mailbox destination compatible string * tag 'zynqmp-dt-for-6.8' of https://github.com/Xilinx/linux-xlnx: arm64: zynqmp: Add missing destination mailbox compatible arm64: zynqmp: Fix clock node name in kv260 cards arm64: zynqmp: Move fixed clock to / for kv260 dt-bindings: soc: Add new board description for MicroBlaze V dt-bindings: soc: xilinx: Move xilinx.yaml from arm to soc arm64: xilinx: Remove address/size-cells from gem nodes arm64: xilinx: Remove address/size-cells from flash node arm64: xilinx: Put ethernet phys to mdio node arm64: xilinx: Remove mt25qu512a compatible string from SOM arm64: xilinx: Use lower case for partition address arm64: xilinx: Do not use '_' in DT node names arm64: dts: xilinx: Apply overlays to base dtbs Link: https://lore.kernel.org/r/CAHTX3dLyA1Y9guLKSNJTChFVvkspMfTa0odULyAdcuFUSiSH3A@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 parents 5d9331b + a98b698 commit 55bfefa

13 files changed

Lines changed: 104 additions & 88 deletions

Documentation/devicetree/bindings/arm/xilinx.yaml renamed to Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
# SPDX-License-Identifier: GPL-2.0
22
%YAML 1.2
33
---
4-
$id: http://devicetree.org/schemas/arm/xilinx.yaml#
4+
$id: http://devicetree.org/schemas/soc/xilinx/xilinx.yaml#
55
$schema: http://devicetree.org/meta-schemas/core.yaml#
66

77
title: Xilinx Zynq Platforms
@@ -132,6 +132,11 @@ properties:
132132
- const: xlnx,zynqmp-smk-k26
133133
- const: xlnx,zynqmp
134134

135+
- description: AMD MicroBlaze V (QEMU)
136+
items:
137+
- const: qemu,mbv
138+
- const: amd,mbv
139+
135140
additionalProperties: true
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137142
...

‎MAINTAINERS‎

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@@ -3020,6 +3020,7 @@ F: Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml
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F: Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml
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F: Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml
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F: Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml
3023+
F: Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml
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F: Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml
30243025
F: arch/arm/mach-zynq/
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F: drivers/clocksource/timer-cadence-ttc.c

‎arch/arm64/boot/dts/xilinx/Makefile‎

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -22,11 +22,10 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k26-revA.dtb
2222
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k26-revA.dtb
2323

2424
zynqmp-sm-k26-revA-sck-kv-g-revA-dtbs := zynqmp-sm-k26-revA.dtb zynqmp-sck-kv-g-revA.dtbo
25+
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k26-revA-sck-kv-g-revA.dtb
2526
zynqmp-sm-k26-revA-sck-kv-g-revB-dtbs := zynqmp-sm-k26-revA.dtb zynqmp-sck-kv-g-revB.dtbo
27+
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k26-revA-sck-kv-g-revB.dtb
2628
zynqmp-smk-k26-revA-sck-kv-g-revA-dtbs := zynqmp-smk-k26-revA.dtb zynqmp-sck-kv-g-revA.dtbo
29+
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k26-revA-sck-kv-g-revA.dtb
2730
zynqmp-smk-k26-revA-sck-kv-g-revB-dtbs := zynqmp-smk-k26-revA.dtb zynqmp-sck-kv-g-revB.dtbo
28-
29-
zynqmp-sm-k26-revA-sck-kr-g-revA-dtbs := zynqmp-sm-k26-revA.dtb zynqmp-sck-kr-g-revA.dtbo
30-
zynqmp-sm-k26-revA-sck-kr-g-revB-dtbs := zynqmp-sm-k26-revA.dtb zynqmp-sck-kr-g-revB.dtbo
31-
zynqmp-smk-k26-revA-sck-kr-g-revA-dtbs := zynqmp-smk-k26-revA.dtb zynqmp-sck-kr-g-revA.dtbo
32-
zynqmp-smk-k26-revA-sck-kr-g-revB-dtbs := zynqmp-smk-k26-revA.dtb zynqmp-sck-kr-g-revB.dtbo
31+
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k26-revA-sck-kv-g-revB.dtb

‎arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso‎

Lines changed: 20 additions & 20 deletions
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@@ -21,57 +21,57 @@
2121
/dts-v1/;
2222
/plugin/;
2323

24-
&i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
25-
#address-cells = <1>;
26-
#size-cells = <0>;
27-
pinctrl-names = "default", "gpio";
28-
pinctrl-0 = <&pinctrl_i2c1_default>;
29-
pinctrl-1 = <&pinctrl_i2c1_gpio>;
30-
scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
31-
sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
32-
33-
/* u14 - 0x40 - ina260 */
34-
/* u27 - 0xe0 - STDP4320 DP/HDMI splitter */
35-
};
36-
37-
&amba {
38-
si5332_0: si5332_0 { /* u17 */
24+
&{/} {
25+
si5332_0: si5332-0 { /* u17 */
3926
compatible = "fixed-clock";
4027
#clock-cells = <0>;
4128
clock-frequency = <125000000>;
4229
};
4330

44-
si5332_1: si5332_1 { /* u17 */
31+
si5332_1: si5332-1 { /* u17 */
4532
compatible = "fixed-clock";
4633
#clock-cells = <0>;
4734
clock-frequency = <25000000>;
4835
};
4936

50-
si5332_2: si5332_2 { /* u17 */
37+
si5332_2: si5332-2 { /* u17 */
5138
compatible = "fixed-clock";
5239
#clock-cells = <0>;
5340
clock-frequency = <48000000>;
5441
};
5542

56-
si5332_3: si5332_3 { /* u17 */
43+
si5332_3: si5332-3 { /* u17 */
5744
compatible = "fixed-clock";
5845
#clock-cells = <0>;
5946
clock-frequency = <24000000>;
6047
};
6148

62-
si5332_4: si5332_4 { /* u17 */
49+
si5332_4: si5332-4 { /* u17 */
6350
compatible = "fixed-clock";
6451
#clock-cells = <0>;
6552
clock-frequency = <26000000>;
6653
};
6754

68-
si5332_5: si5332_5 { /* u17 */
55+
si5332_5: si5332-5 { /* u17 */
6956
compatible = "fixed-clock";
7057
#clock-cells = <0>;
7158
clock-frequency = <27000000>;
7259
};
7360
};
7461

62+
&i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
63+
#address-cells = <1>;
64+
#size-cells = <0>;
65+
pinctrl-names = "default", "gpio";
66+
pinctrl-0 = <&pinctrl_i2c1_default>;
67+
pinctrl-1 = <&pinctrl_i2c1_gpio>;
68+
scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
69+
sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
70+
71+
/* u14 - 0x40 - ina260 */
72+
/* u27 - 0xe0 - STDP4320 DP/HDMI splitter */
73+
};
74+
7575
/* DP/USB 3.0 and SATA */
7676
&psgtr {
7777
status = "okay";

‎arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso‎

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Original file line numberDiff line numberDiff line change
@@ -16,58 +16,58 @@
1616
/dts-v1/;
1717
/plugin/;
1818

19-
&i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
20-
#address-cells = <1>;
21-
#size-cells = <0>;
22-
pinctrl-names = "default", "gpio";
23-
pinctrl-0 = <&pinctrl_i2c1_default>;
24-
pinctrl-1 = <&pinctrl_i2c1_gpio>;
25-
scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
26-
sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
27-
28-
/* u14 - 0x40 - ina260 */
29-
/* u43 - 0x2d - usb5744 */
30-
/* u27 - 0xe0 - STDP4320 DP/HDMI splitter */
31-
};
32-
33-
&amba {
34-
si5332_0: si5332_0 { /* u17 */
19+
&{/} {
20+
si5332_0: si5332-0 { /* u17 */
3521
compatible = "fixed-clock";
3622
#clock-cells = <0>;
3723
clock-frequency = <125000000>;
3824
};
3925

40-
si5332_1: si5332_1 { /* u17 */
26+
si5332_1: si5332-1 { /* u17 */
4127
compatible = "fixed-clock";
4228
#clock-cells = <0>;
4329
clock-frequency = <25000000>;
4430
};
4531

46-
si5332_2: si5332_2 { /* u17 */
32+
si5332_2: si5332-2 { /* u17 */
4733
compatible = "fixed-clock";
4834
#clock-cells = <0>;
4935
clock-frequency = <48000000>;
5036
};
5137

52-
si5332_3: si5332_3 { /* u17 */
38+
si5332_3: si5332-3 { /* u17 */
5339
compatible = "fixed-clock";
5440
#clock-cells = <0>;
5541
clock-frequency = <24000000>;
5642
};
5743

58-
si5332_4: si5332_4 { /* u17 */
44+
si5332_4: si5332-4 { /* u17 */
5945
compatible = "fixed-clock";
6046
#clock-cells = <0>;
6147
clock-frequency = <26000000>;
6248
};
6349

64-
si5332_5: si5332_5 { /* u17 */
50+
si5332_5: si5332-5 { /* u17 */
6551
compatible = "fixed-clock";
6652
#clock-cells = <0>;
6753
clock-frequency = <27000000>;
6854
};
6955
};
7056

57+
&i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
58+
#address-cells = <1>;
59+
#size-cells = <0>;
60+
pinctrl-names = "default", "gpio";
61+
pinctrl-0 = <&pinctrl_i2c1_default>;
62+
pinctrl-1 = <&pinctrl_i2c1_gpio>;
63+
scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
64+
sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
65+
66+
/* u14 - 0x40 - ina260 */
67+
/* u43 - 0x2d - usb5744 */
68+
/* u27 - 0xe0 - STDP4320 DP/HDMI splitter */
69+
};
70+
7171
/* DP/USB 3.0 */
7272
&psgtr {
7373
status = "okay";

‎arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts‎

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -131,9 +131,7 @@
131131
&qspi { /* MIO 0-5 - U143 */
132132
status = "okay";
133133
spi_flash: flash@0 { /* MT25QU512A */
134-
compatible = "mt25qu512a", "jedec,spi-nor"; /* 64MB */
135-
#address-cells = <1>;
136-
#size-cells = <1>;
134+
compatible = "jedec,spi-nor"; /* 64MB */
137135
reg = <0>;
138136
spi-tx-bus-width = <4>;
139137
spi-rx-bus-width = <4>;
@@ -222,9 +220,9 @@
222220
label = "Secure OS Storage";
223221
reg = <0x2280000 0x20000>; /* 128KB */
224222
};
225-
partition@22A0000 {
223+
partition@22a0000 {
226224
label = "User";
227-
reg = <0x22A0000 0x1d60000>; /* 29.375 MB */
225+
reg = <0x22a0000 0x1d60000>; /* 29.375 MB */
228226
};
229227
};
230228
};

‎arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts‎

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -98,8 +98,12 @@
9898
phy-mode = "rgmii-id";
9999
pinctrl-names = "default";
100100
pinctrl-0 = <&pinctrl_gem3_default>;
101-
phy0: ethernet-phy@0 {
102-
reg = <0>;
101+
mdio: mdio {
102+
#address-cells = <1>;
103+
#size-cells = <0>;
104+
phy0: ethernet-phy@0 {
105+
reg = <0>;
106+
};
103107
};
104108
};
105109

‎arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts‎

Lines changed: 10 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -91,12 +91,16 @@
9191
phy-mode = "rgmii-id";
9292
pinctrl-names = "default";
9393
pinctrl-0 = <&pinctrl_gem2_default>;
94-
phy0: ethernet-phy@5 {
95-
reg = <5>;
96-
ti,rx-internal-delay = <0x8>;
97-
ti,tx-internal-delay = <0xa>;
98-
ti,fifo-depth = <0x1>;
99-
ti,dp83867-rxctrl-strap-quirk;
94+
mdio: mdio {
95+
#address-cells = <1>;
96+
#size-cells = <0>;
97+
phy0: ethernet-phy@5 {
98+
reg = <5>;
99+
ti,rx-internal-delay = <0x8>;
100+
ti,tx-internal-delay = <0xa>;
101+
ti,fifo-depth = <0x1>;
102+
ti,dp83867-rxctrl-strap-quirk;
103+
};
100104
};
101105
};
102106

‎arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts‎

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -88,8 +88,12 @@
8888
status = "okay";
8989
phy-handle = <&phy0>;
9090
phy-mode = "rgmii-id";
91-
phy0: ethernet-phy@0 { /* VSC8211 */
92-
reg = <0>;
91+
mdio: mdio {
92+
#address-cells = <1>;
93+
#size-cells = <0>;
94+
phy0: ethernet-phy@0 { /* VSC8211 */
95+
reg = <0>;
96+
};
9397
};
9498
};
9599

‎arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts‎

Lines changed: 15 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -116,17 +116,21 @@
116116
status = "okay";
117117
phy-mode = "rgmii-id";
118118
phy-handle = <&ethernet_phy0>;
119-
ethernet_phy0: ethernet-phy@0 { /* Marvell 88e1512 */
120-
reg = <0>;
121-
};
122-
ethernet_phy7: ethernet-phy@7 { /* Vitesse VSC8211 */
123-
reg = <7>;
124-
};
125-
ethernet_phy3: ethernet-phy@3 { /* Realtek RTL8211DN */
126-
reg = <3>;
127-
};
128-
ethernet_phy8: ethernet-phy@8 { /* Vitesse VSC8211 */
129-
reg = <8>;
119+
mdio: mdio {
120+
#address-cells = <1>;
121+
#size-cells = <0>;
122+
ethernet_phy0: ethernet-phy@0 { /* Marvell 88e1512 */
123+
reg = <0>;
124+
};
125+
ethernet_phy7: ethernet-phy@7 { /* Vitesse VSC8211 */
126+
reg = <7>;
127+
};
128+
ethernet_phy3: ethernet-phy@3 { /* Realtek RTL8211DN */
129+
reg = <3>;
130+
};
131+
ethernet_phy8: ethernet-phy@8 { /* Vitesse VSC8211 */
132+
reg = <8>;
133+
};
130134
};
131135
};
132136

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