Skip to content

Commit 561538f

Browse files
bchihiBLdlezcano
authored andcommitted
thermal/drivers/mediatek/lvts_thermal: Add AP domain for mt8195
Add MT8195 AP Domain support to LVTS Driver. Take the opportunity to update the comments to show calibration data information related to the new domain. [dlezcano]: Massaged a bit the changelog Signed-off-by: Balsam CHIHI <bchihi@baylibre.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230307154524.118541-3-bchihi@baylibre.com
1 parent 05aaa7f commit 561538f

1 file changed

Lines changed: 74 additions & 20 deletions

File tree

drivers/thermal/mediatek/lvts_thermal.c

Lines changed: 74 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -530,29 +530,33 @@ static int lvts_sensor_init(struct device *dev, struct lvts_ctrl *lvts_ctrl,
530530
* The efuse blob values follows the sensor enumeration per thermal
531531
* controller. The decoding of the stream is as follow:
532532
*
533-
* <--?-> <----big0 ???---> <-sensor0-> <-0->
534-
* ------------------------------------------
535-
* index in the stream: : | 0x0 | 0x1 | 0x2 | 0x3 | 0x4 | 0x5 | 0x6 |
536-
* ------------------------------------------
533+
* stream index map for MCU Domain :
537534
*
538-
* <--sensor1--><-0-> <----big1 ???---> <-sen
539-
* ------------------------------------------
540-
* | 0x7 | 0x8 | 0x9 | 0xA | 0xB | OxC | OxD |
541-
* ------------------------------------------
535+
* <-----mcu-tc#0-----> <-----sensor#0-----> <-----sensor#1----->
536+
* 0x01 | 0x02 | 0x03 | 0x04 | 0x05 | 0x06 | 0x07 | 0x08 | 0x09
542537
*
543-
* sor0-> <-0-> <-sensor1-> <-0-> ..........
544-
* ------------------------------------------
545-
* | 0x7 | 0x8 | 0x9 | 0xA | 0xB | OxC | OxD |
546-
* ------------------------------------------
538+
* <-----mcu-tc#1-----> <-----sensor#2-----> <-----sensor#3----->
539+
* 0x0A | 0x0B | 0x0C | 0x0D | 0x0E | 0x0F | 0x10 | 0x11 | 0x12
547540
*
548-
* And so on ...
541+
* <-----mcu-tc#2-----> <-----sensor#4-----> <-----sensor#5-----> <-----sensor#6-----> <-----sensor#7----->
542+
* 0x13 | 0x14 | 0x15 | 0x16 | 0x17 | 0x18 | 0x19 | 0x1A | 0x1B | 0x1C | 0x1D | 0x1E | 0x1F | 0x20 | 0x21
543+
*
544+
* stream index map for AP Domain :
545+
*
546+
* <-----ap--tc#0-----> <-----sensor#0-----> <-----sensor#1----->
547+
* 0x22 | 0x23 | 0x24 | 0x25 | 0x26 | 0x27 | 0x28 | 0x29 | 0x2A
548+
*
549+
* <-----ap--tc#1-----> <-----sensor#2-----> <-----sensor#3----->
550+
* 0x2B | 0x2C | 0x2D | 0x2E | 0x2F | 0x30 | 0x31 | 0x32 | 0x33
551+
*
552+
* <-----ap--tc#2-----> <-----sensor#4-----> <-----sensor#5-----> <-----sensor#6----->
553+
* 0x34 | 0x35 | 0x36 | 0x37 | 0x38 | 0x39 | 0x3A | 0x3B | 0x3C | 0x3D | 0x3E | 0x3F
554+
*
555+
* <-----ap--tc#3-----> <-----sensor#7-----> <-----sensor#8----->
556+
* 0x40 | 0x41 | 0x42 | 0x43 | 0x44 | 0x45 | 0x46 | 0x47 | 0x48
549557
*
550558
* The data description gives the offset of the calibration data in
551559
* this bytes stream for each sensor.
552-
*
553-
* Each thermal controller can handle up to 4 sensors max, we don't
554-
* care if there are less as the array of calibration is sized to 4
555-
* anyway. The unused sensor slot will be zeroed.
556560
*/
557561
static int lvts_calibration_init(struct device *dev, struct lvts_ctrl *lvts_ctrl,
558562
const struct lvts_ctrl_data *lvts_ctrl_data,
@@ -1165,7 +1169,7 @@ static int lvts_remove(struct platform_device *pdev)
11651169
return 0;
11661170
}
11671171

1168-
static const struct lvts_ctrl_data mt8195_lvts_data_ctrl[] = {
1172+
static const struct lvts_ctrl_data mt8195_lvts_mcu_data_ctrl[] = {
11691173
{
11701174
.cal_offset = { 0x04, 0x07 },
11711175
.lvts_sensor = {
@@ -1200,13 +1204,63 @@ static const struct lvts_ctrl_data mt8195_lvts_data_ctrl[] = {
12001204
}
12011205
};
12021206

1207+
static const struct lvts_ctrl_data mt8195_lvts_ap_data_ctrl[] = {
1208+
{
1209+
.cal_offset = { 0x25, 0x28 },
1210+
.lvts_sensor = {
1211+
{ .dt_id = MT8195_AP_VPU0 },
1212+
{ .dt_id = MT8195_AP_VPU1 }
1213+
},
1214+
.num_lvts_sensor = 2,
1215+
.offset = 0x0,
1216+
.hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8195,
1217+
},
1218+
{
1219+
.cal_offset = { 0x2e, 0x31 },
1220+
.lvts_sensor = {
1221+
{ .dt_id = MT8195_AP_GPU0 },
1222+
{ .dt_id = MT8195_AP_GPU1 }
1223+
},
1224+
.num_lvts_sensor = 2,
1225+
.offset = 0x100,
1226+
.hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8195,
1227+
},
1228+
{
1229+
.cal_offset = { 0x37, 0x3a, 0x3d },
1230+
.lvts_sensor = {
1231+
{ .dt_id = MT8195_AP_VDEC },
1232+
{ .dt_id = MT8195_AP_IMG },
1233+
{ .dt_id = MT8195_AP_INFRA },
1234+
},
1235+
.num_lvts_sensor = 3,
1236+
.offset = 0x200,
1237+
.hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8195,
1238+
},
1239+
{
1240+
.cal_offset = { 0x43, 0x46 },
1241+
.lvts_sensor = {
1242+
{ .dt_id = MT8195_AP_CAM0 },
1243+
{ .dt_id = MT8195_AP_CAM1 }
1244+
},
1245+
.num_lvts_sensor = 2,
1246+
.offset = 0x300,
1247+
.hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8195,
1248+
}
1249+
};
1250+
12031251
static const struct lvts_data mt8195_lvts_mcu_data = {
1204-
.lvts_ctrl = mt8195_lvts_data_ctrl,
1205-
.num_lvts_ctrl = ARRAY_SIZE(mt8195_lvts_data_ctrl),
1252+
.lvts_ctrl = mt8195_lvts_mcu_data_ctrl,
1253+
.num_lvts_ctrl = ARRAY_SIZE(mt8195_lvts_mcu_data_ctrl),
1254+
};
1255+
1256+
static const struct lvts_data mt8195_lvts_ap_data = {
1257+
.lvts_ctrl = mt8195_lvts_ap_data_ctrl,
1258+
.num_lvts_ctrl = ARRAY_SIZE(mt8195_lvts_ap_data_ctrl),
12061259
};
12071260

12081261
static const struct of_device_id lvts_of_match[] = {
12091262
{ .compatible = "mediatek,mt8195-lvts-mcu", .data = &mt8195_lvts_mcu_data },
1263+
{ .compatible = "mediatek,mt8195-lvts-ap", .data = &mt8195_lvts_ap_data },
12101264
{},
12111265
};
12121266
MODULE_DEVICE_TABLE(of, lvts_of_match);

0 commit comments

Comments
 (0)