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Merge tag 'pci-v5.13-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull pci updates from Bjorn Helgaas: "Enumeration: - Release OF node when pci_scan_device() fails (Dmitry Baryshkov) - Add pci_disable_parity() (Bjorn Helgaas) - Disable Mellanox Tavor parity reporting (Heiner Kallweit) - Disable N2100 r8169 parity reporting (Heiner Kallweit) - Fix RCiEP device to RCEC association (Qiuxu Zhuo) - Convert sysfs "config", "rom", "reset", "label", "index", "acpi_index" to static attributes to help fix races in device enumeration (Krzysztof Wilczyński) - Convert sysfs "vpd" to static attribute (Heiner Kallweit, Krzysztof Wilczyński) - Use sysfs_emit() in "show" functions (Krzysztof Wilczyński) - Remove unused alloc_pci_root_info() return value (Krzysztof Wilczyński) PCI device hotplug: - Fix acpiphp reference count leak (Feilong Lin) Power management: - Fix acpi_pci_set_power_state() debug message (Rafael J. Wysocki) - Fix runtime PM imbalance (Dinghao Liu) Virtualization: - Increase delay after FLR to work around Intel DC P4510 NVMe erratum (Raphael Norwitz) MSI: - Convert rcar, tegra, xilinx to MSI domains (Marc Zyngier) - For rcar, xilinx, use controller address as MSI doorbell (Marc Zyngier) - Remove unused hv msi_controller struct (Marc Zyngier) - Remove unused PCI core msi_controller support (Marc Zyngier) - Remove struct msi_controller altogether (Marc Zyngier) - Remove unused default_teardown_msi_irqs() (Marc Zyngier) - Let host bridges declare their reliance on MSI domains (Marc Zyngier) - Make pci_host_common_probe() declare its reliance on MSI domains (Marc Zyngier) - Advertise mediatek lack of built-in MSI handling (Thomas Gleixner) - Document ways of ending up with NO_MSI (Marc Zyngier) - Refactor HT advertising of NO_MSI flag (Marc Zyngier) VPD: - Remove obsolete Broadcom NIC VPD length-limiting quirk (Heiner Kallweit) - Remove sysfs VPD size checking dead code (Heiner Kallweit) - Convert VPF sysfs file to static attribute (Heiner Kallweit) - Remove unnecessary pci_set_vpd_size() (Heiner Kallweit) - Tone down "missing VPD" message (Heiner Kallweit) Endpoint framework: - Fix NULL pointer dereference when epc_features not implemented (Shradha Todi) - Add missing destroy_workqueue() in endpoint test (Yang Yingliang) Amazon Annapurna Labs PCIe controller driver: - Fix compile testing without CONFIG_PCI_ECAM (Arnd Bergmann) - Fix "no symbols" warnings when compile testing with CONFIG_TRIM_UNUSED_KSYMS (Arnd Bergmann) APM X-Gene PCIe controller driver: - Fix cfg resource mapping regression (Dejin Zheng) Broadcom iProc PCIe controller driver: - Return zero for success of iproc_msi_irq_domain_alloc() (Pali Rohár) Broadcom STB PCIe controller driver: - Add reset_control_rearm() stub for !CONFIG_RESET_CONTROLLER (Jim Quinlan) - Fix use of BCM7216 reset controller (Jim Quinlan) - Use reset/rearm for Broadcom STB pulse reset instead of deassert/assert (Jim Quinlan) - Fix brcm_pcie_probe() error return for unsupported revision (Wei Yongjun) Cavium ThunderX PCIe controller driver: - Fix compile testing (Arnd Bergmann) - Fix "no symbols" warnings when compile testing with CONFIG_TRIM_UNUSED_KSYMS (Arnd Bergmann) Freescale Layerscape PCIe controller driver: - Fix ls_pcie_ep_probe() syntax error (comma for semicolon) (Krzysztof Wilczyński) - Remove layerscape-gen4 dependencies on OF and ARM64, add dependency on ARCH_LAYERSCAPE (Geert Uytterhoeven) HiSilicon HIP PCIe controller driver: - Remove obsolete HiSilicon PCIe DT description (Dongdong Liu) Intel Gateway PCIe controller driver: - Remove unused pcie_app_rd() (Jiapeng Chong) Intel VMD host bridge driver: - Program IRTE with Requester ID of VMD endpoint, not child device (Jon Derrick) - Disable VMD MSI-X remapping when possible so children can use more MSI-X vectors (Jon Derrick) MediaTek PCIe controller driver: - Configure FC and FTS for functions other than 0 (Ryder Lee) - Add YAML schema for MediaTek (Jianjun Wang) - Export pci_pio_to_address() for module use (Jianjun Wang) - Add MediaTek MT8192 PCIe controller driver (Jianjun Wang) - Add MediaTek MT8192 INTx support (Jianjun Wang) - Add MediaTek MT8192 MSI support (Jianjun Wang) - Add MediaTek MT8192 system power management support (Jianjun Wang) - Add missing MODULE_DEVICE_TABLE (Qiheng Lin) Microchip PolarFlare PCIe controller driver: - Make several symbols static (Wei Yongjun) NVIDIA Tegra PCIe controller driver: - Add MCFG quirks for Tegra194 ECAM errata (Vidya Sagar) - Make several symbols const (Rikard Falkeborn) - Fix Kconfig host/endpoint typo (Wesley Sheng) SiFive FU740 PCIe controller driver: - Add pcie_aux clock to prci driver (Greentime Hu) - Use reset-simple in prci driver for PCIe (Greentime Hu) - Add SiFive FU740 PCIe host controller driver and DT binding (Paul Walmsley, Greentime Hu) Synopsys DesignWare PCIe controller driver: - Move MSI Receiver init to dw_pcie_host_init() so it is re-initialized along with the RC in resume (Jisheng Zhang) - Move iATU detection earlier to fix regression (Hou Zhiqiang) TI J721E PCIe driver: - Add DT binding and TI j721e support for refclk to PCIe connector (Kishon Vijay Abraham I) - Add host mode and endpoint mode DT bindings for TI AM64 SoC (Kishon Vijay Abraham I) TI Keystone PCIe controller driver: - Use generic config accessors for TI AM65x (K3) to fix regression (Kishon Vijay Abraham I) Xilinx NWL PCIe controller driver: - Add support for coherent PCIe DMA traffic using CCI (Bharat Kumar Gogada) - Add optional "dma-coherent" DT property (Bharat Kumar Gogada) Miscellaneous: - Fix kernel-doc warnings (Krzysztof Wilczyński) - Remove unused MicroGate SyncLink device IDs (Jiri Slaby) - Remove redundant dev_err() for devm_ioremap_resource() failure (Chen Hui) - Remove redundant initialization (Colin Ian King) - Drop redundant dev_err() for platform_get_irq() errors (Krzysztof Wilczyński)" * tag 'pci-v5.13-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (98 commits) riscv: dts: Add PCIe support for the SiFive FU740-C000 SoC PCI: fu740: Add SiFive FU740 PCIe host controller driver dt-bindings: PCI: Add SiFive FU740 PCIe host controller MAINTAINERS: Add maintainers for SiFive FU740 PCIe driver clk: sifive: Use reset-simple in prci driver for PCIe driver clk: sifive: Add pcie_aux clock in prci driver for PCIe driver PCI: brcmstb: Use reset/rearm instead of deassert/assert ata: ahci_brcm: Fix use of BCM7216 reset controller reset: add missing empty function reset_control_rearm() PCI: Allow VPD access for QLogic ISP2722 PCI/VPD: Add helper pci_get_func0_dev() PCI/VPD: Remove pci_vpd_find_tag() SRDT handling PCI/VPD: Remove pci_vpd_find_tag() 'offset' argument PCI/VPD: Change pci_vpd_init() return type to void PCI/VPD: Make missing VPD message less alarming PCI/VPD: Remove pci_set_vpd_size() x86/PCI: Remove unused alloc_pci_root_info() return value MAINTAINERS: Add Jianjun Wang as MediaTek PCI co-maintainer PCI: mediatek-gen3: Add system PM support PCI: mediatek-gen3: Add MSI support ...
2 parents 7b9df26 + 882862a commit 57151b5

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Lines changed: 2930 additions & 1269 deletions

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‎Documentation/devicetree/bindings/pci/hisilicon-pcie.txt‎

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‎Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml‎

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/mediatek-pcie-gen3.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Gen3 PCIe controller on MediaTek SoCs
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maintainers:
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- Jianjun Wang <jianjun.wang@mediatek.com>
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description: |+
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PCIe Gen3 MAC controller for MediaTek SoCs, it supports Gen3 speed
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and compatible with Gen2, Gen1 speed.
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This PCIe controller supports up to 256 MSI vectors, the MSI hardware
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block diagram is as follows:
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+-----+
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| GIC |
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+-----+
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^
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|
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port->irq
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|
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+-+-+-+-+-+-+-+-+
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|0|1|2|3|4|5|6|7| (PCIe intc)
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+-+-+-+-+-+-+-+-+
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^ ^ ^
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| | ... |
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+-------+ +------+ +-----------+
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| | |
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+-+-+---+--+--+ +-+-+---+--+--+ +-+-+---+--+--+
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|0|1|...|30|31| |0|1|...|30|31| |0|1|...|30|31| (MSI sets)
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+-+-+---+--+--+ +-+-+---+--+--+ +-+-+---+--+--+
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^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^
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| | | | | | | | | | | | (MSI vectors)
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| | | | | | | | | | | |
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(MSI SET0) (MSI SET1) ... (MSI SET7)
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With 256 MSI vectors supported, the MSI vectors are composed of 8 sets,
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each set has its own address for MSI message, and supports 32 MSI vectors
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to generate interrupt.
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allOf:
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- $ref: /schemas/pci/pci-bus.yaml#
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properties:
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compatible:
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const: mediatek,mt8192-pcie
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reg:
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maxItems: 1
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reg-names:
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items:
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- const: pcie-mac
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interrupts:
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maxItems: 1
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ranges:
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minItems: 1
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maxItems: 8
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resets:
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minItems: 1
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maxItems: 2
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reset-names:
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minItems: 1
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maxItems: 2
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items:
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- const: phy
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- const: mac
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clocks:
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maxItems: 6
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clock-names:
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items:
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- const: pl_250m
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- const: tl_26m
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- const: tl_96m
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- const: tl_32k
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- const: peri_26m
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- const: top_133m
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assigned-clocks:
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maxItems: 1
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assigned-clock-parents:
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maxItems: 1
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phys:
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maxItems: 1
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'#interrupt-cells':
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const: 1
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interrupt-controller:
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description: Interrupt controller node for handling legacy PCI interrupts.
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type: object
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properties:
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'#address-cells':
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const: 0
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'#interrupt-cells':
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const: 1
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interrupt-controller: true
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required:
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- '#address-cells'
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- '#interrupt-cells'
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- interrupt-controller
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additionalProperties: false
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required:
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- compatible
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- reg
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- reg-names
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- interrupts
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- ranges
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- clocks
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- '#interrupt-cells'
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- interrupt-controller
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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bus {
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#address-cells = <2>;
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#size-cells = <2>;
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pcie: pcie@11230000 {
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compatible = "mediatek,mt8192-pcie";
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device_type = "pci";
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#address-cells = <3>;
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#size-cells = <2>;
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reg = <0x00 0x11230000 0x00 0x4000>;
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reg-names = "pcie-mac";
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interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH 0>;
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bus-range = <0x00 0xff>;
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ranges = <0x82000000 0x00 0x12000000 0x00
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0x12000000 0x00 0x1000000>;
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clocks = <&infracfg 44>,
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<&infracfg 40>,
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<&infracfg 43>,
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<&infracfg 97>,
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<&infracfg 99>,
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<&infracfg 111>;
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clock-names = "pl_250m", "tl_26m", "tl_96m",
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"tl_32k", "peri_26m", "top_133m";
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assigned-clocks = <&topckgen 50>;
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assigned-clock-parents = <&topckgen 91>;
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phys = <&pciephy>;
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phy-names = "pcie-phy";
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resets = <&infracfg_rst 2>,
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<&infracfg_rst 3>;
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reset-names = "phy", "mac";
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0x7>;
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interrupt-map = <0 0 0 1 &pcie_intc 0>,
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<0 0 0 2 &pcie_intc 1>,
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<0 0 0 3 &pcie_intc 2>,
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<0 0 0 4 &pcie_intc 3>;
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pcie_intc: interrupt-controller {
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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};
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};
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};

‎Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/sifive,fu740-pcie.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: SiFive FU740 PCIe host controller
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description: |+
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SiFive FU740 PCIe host controller is based on the Synopsys DesignWare
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PCI core. It shares common features with the PCIe DesignWare core and
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inherits common properties defined in
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Documentation/devicetree/bindings/pci/designware-pcie.txt.
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maintainers:
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- Paul Walmsley <paul.walmsley@sifive.com>
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- Greentime Hu <greentime.hu@sifive.com>
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allOf:
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- $ref: /schemas/pci/pci-bus.yaml#
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properties:
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compatible:
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const: sifive,fu740-pcie
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reg:
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maxItems: 3
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reg-names:
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items:
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- const: dbi
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- const: config
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- const: mgmt
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num-lanes:
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const: 8
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msi-parent: true
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interrupt-names:
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items:
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- const: msi
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- const: inta
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- const: intb
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- const: intc
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- const: intd
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resets:
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description: A phandle to the PCIe power up reset line.
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maxItems: 1
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pwren-gpios:
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description: Should specify the GPIO for controlling the PCI bus device power on.
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maxItems: 1
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reset-gpios:
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maxItems: 1
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required:
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- dma-coherent
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- num-lanes
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- interrupts
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- interrupt-names
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- interrupt-parent
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- interrupt-map-mask
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- interrupt-map
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- clock-names
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- clocks
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- resets
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- pwren-gpios
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- reset-gpios
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unevaluatedProperties: false
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examples:
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- |
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bus {
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#address-cells = <2>;
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#size-cells = <2>;
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#include <dt-bindings/clock/sifive-fu740-prci.h>
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pcie@e00000000 {
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compatible = "sifive,fu740-pcie";
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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reg = <0xe 0x00000000 0x0 0x80000000>,
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<0xd 0xf0000000 0x0 0x10000000>,
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<0x0 0x100d0000 0x0 0x1000>;
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reg-names = "dbi", "config", "mgmt";
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device_type = "pci";
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dma-coherent;
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bus-range = <0x0 0xff>;
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ranges = <0x81000000 0x0 0x60080000 0x0 0x60080000 0x0 0x10000>, /* I/O */
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<0x82000000 0x0 0x60090000 0x0 0x60090000 0x0 0xff70000>, /* mem */
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<0x82000000 0x0 0x70000000 0x0 0x70000000 0x0 0x1000000>, /* mem */
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<0xc3000000 0x20 0x00000000 0x20 0x00000000 0x20 0x00000000>; /* mem prefetchable */
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num-lanes = <0x8>;
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interrupts = <56>, <57>, <58>, <59>, <60>, <61>, <62>, <63>, <64>;
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interrupt-names = "msi", "inta", "intb", "intc", "intd";
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interrupt-parent = <&plic0>;
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interrupt-map-mask = <0x0 0x0 0x0 0x7>;
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interrupt-map = <0x0 0x0 0x0 0x1 &plic0 57>,
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<0x0 0x0 0x0 0x2 &plic0 58>,
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<0x0 0x0 0x0 0x3 &plic0 59>,
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<0x0 0x0 0x0 0x4 &plic0 60>;
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clock-names = "pcie_aux";
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clocks = <&prci PRCI_CLK_PCIE_AUX>;
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resets = <&prci 4>;
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pwren-gpios = <&gpio 5 0>;
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reset-gpios = <&gpio 8 0>;
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};
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};

‎Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml‎

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properties:
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compatible:
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oneOf:
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- description: PCIe EP controller in J7200
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- const: ti,j721e-pcie-ep
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- description: PCIe EP controller in AM64
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items:
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- const: ti,j7200-pcie-ep
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- const: ti,am64-pcie-ep
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- const: ti,j721e-pcie-ep
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- description: PCIe EP controller in J721E
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- description: PCIe EP controller in J7200
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items:
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- const: ti,j7200-pcie-ep
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- const: ti,j721e-pcie-ep
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reg:
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- power-domains
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- clocks
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- clock-names
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- dma-coherent
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- max-functions
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- phys
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- phy-names

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