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airliedairlied
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Merge branch '04.01-ampere-lite' of git://github.com/skeggsb/linux into topic/nouveau-ampere-modeset
This adds support for basic modeseting on the nvidia ampere chipsets. This code should all be contained to just those and have no effect on current hardware. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Ben Skeggs <skeggsb@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/CACAvsv5LmMP+HbDUQBf_dy1-0eS9fA32k8HWo4y5X4-7rsw-yw@mail.gmail.com
2 parents c8f6364 + 8ef23b6 commit 584265d

46 files changed

Lines changed: 892 additions & 18 deletions

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‎drivers/gpu/drm/nouveau/dispnv50/Kbuild‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -37,6 +37,7 @@ nouveau-y += dispnv50/wimmc37b.o
3737
nouveau-y += dispnv50/wndw.o
3838
nouveau-y += dispnv50/wndwc37e.o
3939
nouveau-y += dispnv50/wndwc57e.o
40+
nouveau-y += dispnv50/wndwc67e.o
4041

4142
nouveau-y += dispnv50/base.o
4243
nouveau-y += dispnv50/base507c.o

‎drivers/gpu/drm/nouveau/dispnv50/core.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -42,6 +42,7 @@ nv50_core_new(struct nouveau_drm *drm, struct nv50_core **pcore)
4242
int version;
4343
int (*new)(struct nouveau_drm *, s32, struct nv50_core **);
4444
} cores[] = {
45+
{ GA102_DISP_CORE_CHANNEL_DMA, 0, corec57d_new },
4546
{ TU102_DISP_CORE_CHANNEL_DMA, 0, corec57d_new },
4647
{ GV100_DISP_CORE_CHANNEL_DMA, 0, corec37d_new },
4748
{ GP102_DISP_CORE_CHANNEL_DMA, 0, core917d_new },

‎drivers/gpu/drm/nouveau/dispnv50/curs.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -31,6 +31,7 @@ nv50_curs_new(struct nouveau_drm *drm, int head, struct nv50_wndw **pwndw)
3131
int version;
3232
int (*new)(struct nouveau_drm *, int, s32, struct nv50_wndw **);
3333
} curses[] = {
34+
{ GA102_DISP_CURSOR, 0, cursc37a_new },
3435
{ TU102_DISP_CURSOR, 0, cursc37a_new },
3536
{ GV100_DISP_CURSOR, 0, cursc37a_new },
3637
{ GK104_DISP_CURSOR, 0, curs907a_new },

‎drivers/gpu/drm/nouveau/dispnv50/wimm.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -31,6 +31,7 @@ nv50_wimm_init(struct nouveau_drm *drm, struct nv50_wndw *wndw)
3131
int version;
3232
int (*init)(struct nouveau_drm *, s32, struct nv50_wndw *);
3333
} wimms[] = {
34+
{ GA102_DISP_WINDOW_IMM_CHANNEL_DMA, 0, wimmc37b_init },
3435
{ TU102_DISP_WINDOW_IMM_CHANNEL_DMA, 0, wimmc37b_init },
3536
{ GV100_DISP_WINDOW_IMM_CHANNEL_DMA, 0, wimmc37b_init },
3637
{}

‎drivers/gpu/drm/nouveau/dispnv50/wndw.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -784,6 +784,7 @@ nv50_wndw_new(struct nouveau_drm *drm, enum drm_plane_type type, int index,
784784
int (*new)(struct nouveau_drm *, enum drm_plane_type,
785785
int, s32, struct nv50_wndw **);
786786
} wndws[] = {
787+
{ GA102_DISP_WINDOW_CHANNEL_DMA, 0, wndwc67e_new },
787788
{ TU102_DISP_WINDOW_CHANNEL_DMA, 0, wndwc57e_new },
788789
{ GV100_DISP_WINDOW_CHANNEL_DMA, 0, wndwc37e_new },
789790
{}

‎drivers/gpu/drm/nouveau/dispnv50/wndw.h‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -129,6 +129,14 @@ int wndwc37e_update(struct nv50_wndw *, u32 *);
129129

130130
int wndwc57e_new(struct nouveau_drm *, enum drm_plane_type, int, s32,
131131
struct nv50_wndw **);
132+
bool wndwc57e_ilut(struct nv50_wndw *, struct nv50_wndw_atom *, int);
133+
int wndwc57e_ilut_set(struct nv50_wndw *, struct nv50_wndw_atom *);
134+
int wndwc57e_ilut_clr(struct nv50_wndw *);
135+
int wndwc57e_csc_set(struct nv50_wndw *, struct nv50_wndw_atom *);
136+
int wndwc57e_csc_clr(struct nv50_wndw *);
137+
138+
int wndwc67e_new(struct nouveau_drm *, enum drm_plane_type, int, s32,
139+
struct nv50_wndw **);
132140

133141
int nv50_wndw_new(struct nouveau_drm *, enum drm_plane_type, int index,
134142
struct nv50_wndw **);

‎drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -80,7 +80,7 @@ wndwc57e_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
8080
return 0;
8181
}
8282

83-
static int
83+
int
8484
wndwc57e_csc_clr(struct nv50_wndw *wndw)
8585
{
8686
struct nvif_push *push = wndw->wndw.push;
@@ -98,7 +98,7 @@ wndwc57e_csc_clr(struct nv50_wndw *wndw)
9898
return 0;
9999
}
100100

101-
static int
101+
int
102102
wndwc57e_csc_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
103103
{
104104
struct nvif_push *push = wndw->wndw.push;
@@ -111,7 +111,7 @@ wndwc57e_csc_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
111111
return 0;
112112
}
113113

114-
static int
114+
int
115115
wndwc57e_ilut_clr(struct nv50_wndw *wndw)
116116
{
117117
struct nvif_push *push = wndw->wndw.push;
@@ -124,7 +124,7 @@ wndwc57e_ilut_clr(struct nv50_wndw *wndw)
124124
return 0;
125125
}
126126

127-
static int
127+
int
128128
wndwc57e_ilut_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
129129
{
130130
struct nvif_push *push = wndw->wndw.push;
@@ -179,7 +179,7 @@ wndwc57e_ilut_load(struct drm_color_lut *in, int size, void __iomem *mem)
179179
writew(readw(mem - 4), mem + 4);
180180
}
181181

182-
static bool
182+
bool
183183
wndwc57e_ilut(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw, int size)
184184
{
185185
if (size = size ? size : 1024, size != 256 && size != 1024)

‎drivers/gpu/drm/nouveau/dispnv50/wndwc67e.c‎

Lines changed: 106 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,106 @@
1+
/*
2+
* Copyright 2021 Red Hat Inc.
3+
*
4+
* Permission is hereby granted, free of charge, to any person obtaining a
5+
* copy of this software and associated documentation files (the "Software"),
6+
* to deal in the Software without restriction, including without limitation
7+
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8+
* and/or sell copies of the Software, and to permit persons to whom the
9+
* Software is furnished to do so, subject to the following conditions:
10+
*
11+
* The above copyright notice and this permission notice shall be included in
12+
* all copies or substantial portions of the Software.
13+
*
14+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17+
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18+
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19+
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20+
* OTHER DEALINGS IN THE SOFTWARE.
21+
*/
22+
#include "wndw.h"
23+
#include "atom.h"
24+
25+
#include <nvif/pushc37b.h>
26+
27+
#include <nvhw/class/clc57e.h>
28+
29+
static int
30+
wndwc67e_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
31+
{
32+
struct nvif_push *push = wndw->wndw.push;
33+
int ret;
34+
35+
if ((ret = PUSH_WAIT(push, 17)))
36+
return ret;
37+
38+
PUSH_MTHD(push, NVC57E, SET_PRESENT_CONTROL,
39+
NVVAL(NVC57E, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval) |
40+
NVVAL(NVC57E, SET_PRESENT_CONTROL, BEGIN_MODE, asyw->image.mode) |
41+
NVDEF(NVC57E, SET_PRESENT_CONTROL, TIMESTAMP_MODE, DISABLE));
42+
43+
PUSH_MTHD(push, NVC57E, SET_SIZE,
44+
NVVAL(NVC57E, SET_SIZE, WIDTH, asyw->image.w) |
45+
NVVAL(NVC57E, SET_SIZE, HEIGHT, asyw->image.h),
46+
47+
SET_STORAGE,
48+
NVVAL(NVC57E, SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh),
49+
50+
SET_PARAMS,
51+
NVVAL(NVC57E, SET_PARAMS, FORMAT, asyw->image.format) |
52+
NVDEF(NVC57E, SET_PARAMS, CLAMP_BEFORE_BLEND, DISABLE) |
53+
NVDEF(NVC57E, SET_PARAMS, SWAP_UV, DISABLE) |
54+
NVDEF(NVC57E, SET_PARAMS, FMT_ROUNDING_MODE, ROUND_TO_NEAREST),
55+
56+
SET_PLANAR_STORAGE(0),
57+
NVVAL(NVC57E, SET_PLANAR_STORAGE, PITCH, asyw->image.blocks[0]) |
58+
NVVAL(NVC57E, SET_PLANAR_STORAGE, PITCH, asyw->image.pitch[0] >> 6));
59+
60+
PUSH_MTHD(push, NVC57E, SET_CONTEXT_DMA_ISO(0), asyw->image.handle, 1);
61+
PUSH_MTHD(push, NVC57E, SET_OFFSET(0), asyw->image.offset[0] >> 8);
62+
63+
PUSH_MTHD(push, NVC57E, SET_POINT_IN(0),
64+
NVVAL(NVC57E, SET_POINT_IN, X, asyw->state.src_x >> 16) |
65+
NVVAL(NVC57E, SET_POINT_IN, Y, asyw->state.src_y >> 16));
66+
67+
PUSH_MTHD(push, NVC57E, SET_SIZE_IN,
68+
NVVAL(NVC57E, SET_SIZE_IN, WIDTH, asyw->state.src_w >> 16) |
69+
NVVAL(NVC57E, SET_SIZE_IN, HEIGHT, asyw->state.src_h >> 16));
70+
71+
PUSH_MTHD(push, NVC57E, SET_SIZE_OUT,
72+
NVVAL(NVC57E, SET_SIZE_OUT, WIDTH, asyw->state.crtc_w) |
73+
NVVAL(NVC57E, SET_SIZE_OUT, HEIGHT, asyw->state.crtc_h));
74+
return 0;
75+
}
76+
77+
static const struct nv50_wndw_func
78+
wndwc67e = {
79+
.acquire = wndwc37e_acquire,
80+
.release = wndwc37e_release,
81+
.sema_set = wndwc37e_sema_set,
82+
.sema_clr = wndwc37e_sema_clr,
83+
.ntfy_set = wndwc37e_ntfy_set,
84+
.ntfy_clr = wndwc37e_ntfy_clr,
85+
.ntfy_reset = corec37d_ntfy_init,
86+
.ntfy_wait_begun = base507c_ntfy_wait_begun,
87+
.ilut = wndwc57e_ilut,
88+
.ilut_identity = true,
89+
.ilut_size = 1024,
90+
.xlut_set = wndwc57e_ilut_set,
91+
.xlut_clr = wndwc57e_ilut_clr,
92+
.csc = base907c_csc,
93+
.csc_set = wndwc57e_csc_set,
94+
.csc_clr = wndwc57e_csc_clr,
95+
.image_set = wndwc67e_image_set,
96+
.image_clr = wndwc37e_image_clr,
97+
.blend_set = wndwc37e_blend_set,
98+
.update = wndwc37e_update,
99+
};
100+
101+
int
102+
wndwc67e_new(struct nouveau_drm *drm, enum drm_plane_type type, int index,
103+
s32 oclass, struct nv50_wndw **pwndw)
104+
{
105+
return wndwc37e_new_(&wndwc67e, drm, type, index, oclass, BIT(index >> 1), pwndw);
106+
}

‎drivers/gpu/drm/nouveau/include/nvif/cl0080.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,7 @@ struct nv_device_info_v0 {
3333
#define NV_DEVICE_INFO_V0_PASCAL 0x0a
3434
#define NV_DEVICE_INFO_V0_VOLTA 0x0b
3535
#define NV_DEVICE_INFO_V0_TURING 0x0c
36+
#define NV_DEVICE_INFO_V0_AMPERE 0x0d
3637
__u8 family;
3738
__u8 pad06[2];
3839
__u64 ram_size;

‎drivers/gpu/drm/nouveau/include/nvif/class.h‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -88,6 +88,7 @@
8888
#define GP102_DISP /* cl5070.h */ 0x00009870
8989
#define GV100_DISP /* cl5070.h */ 0x0000c370
9090
#define TU102_DISP /* cl5070.h */ 0x0000c570
91+
#define GA102_DISP /* cl5070.h */ 0x0000c670
9192

9293
#define GV100_DISP_CAPS 0x0000c373
9394

@@ -103,6 +104,7 @@
103104
#define GK104_DISP_CURSOR /* cl507a.h */ 0x0000917a
104105
#define GV100_DISP_CURSOR /* cl507a.h */ 0x0000c37a
105106
#define TU102_DISP_CURSOR /* cl507a.h */ 0x0000c57a
107+
#define GA102_DISP_CURSOR /* cl507a.h */ 0x0000c67a
106108

107109
#define NV50_DISP_OVERLAY /* cl507b.h */ 0x0000507b
108110
#define G82_DISP_OVERLAY /* cl507b.h */ 0x0000827b
@@ -112,6 +114,7 @@
112114

113115
#define GV100_DISP_WINDOW_IMM_CHANNEL_DMA /* clc37b.h */ 0x0000c37b
114116
#define TU102_DISP_WINDOW_IMM_CHANNEL_DMA /* clc37b.h */ 0x0000c57b
117+
#define GA102_DISP_WINDOW_IMM_CHANNEL_DMA /* clc37b.h */ 0x0000c67b
115118

116119
#define NV50_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000507c
117120
#define G82_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000827c
@@ -135,6 +138,7 @@
135138
#define GP102_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000987d
136139
#define GV100_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000c37d
137140
#define TU102_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000c57d
141+
#define GA102_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000c67d
138142

139143
#define NV50_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000507e
140144
#define G82_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000827e
@@ -145,6 +149,7 @@
145149

146150
#define GV100_DISP_WINDOW_CHANNEL_DMA /* clc37e.h */ 0x0000c37e
147151
#define TU102_DISP_WINDOW_CHANNEL_DMA /* clc37e.h */ 0x0000c57e
152+
#define GA102_DISP_WINDOW_CHANNEL_DMA /* clc37e.h */ 0x0000c67e
148153

149154
#define NV50_TESLA 0x00005097
150155
#define G82_TESLA 0x00008297

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