Skip to content

Commit 5911ff4

Browse files
Hao ZhangSuzuki K Poulose
authored andcommitted
dt-bindings: arm: Add support for Coresight dummy trace
This patch add support for Coresight dummy source and dummy sink trace. Signed-off-by: Hao Zhang <quic_hazha@quicinc.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230602084149.40031-3-quic_hazha@quicinc.com
1 parent 9d3ba0b commit 5911ff4

2 files changed

Lines changed: 144 additions & 0 deletions

File tree

Lines changed: 73 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,73 @@
1+
# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
2+
%YAML 1.2
3+
---
4+
$id: http://devicetree.org/schemas/arm/arm,coresight-dummy-sink.yaml#
5+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+
title: ARM Coresight Dummy sink component
8+
9+
description: |
10+
CoreSight components are compliant with the ARM CoreSight architecture
11+
specification and can be connected in various topologies to suit a particular
12+
SoCs tracing needs. These trace components can generally be classified as
13+
sinks, links and sources. Trace data produced by one or more sources flows
14+
through the intermediate links connecting the source to the currently selected
15+
sink.
16+
17+
The Coresight dummy sink component is for the specific coresight sink devices
18+
kernel don't have permission to access or configure, e.g., CoreSight EUD on
19+
Qualcomm platforms. It is a mini-USB hub implemented to support the USB-based
20+
debug and trace capabilities. For this device, a dummy driver is needed to
21+
register it as Coresight sink device in kernel side, so that path can be
22+
created in the driver. Then the trace flow would be transferred to EUD via
23+
coresight link of AP processor. It provides Coresight API for operations on
24+
dummy source devices, such as enabling and disabling them. It also provides
25+
the Coresight dummy source paths for debugging.
26+
27+
The primary use case of the coresight dummy sink is to build path in kernel
28+
side for dummy sink component.
29+
30+
maintainers:
31+
- Mike Leach <mike.leach@linaro.org>
32+
- Suzuki K Poulose <suzuki.poulose@arm.com>
33+
- James Clark <james.clark@arm.com>
34+
- Mao Jinlong <quic_jinlmao@quicinc.com>
35+
- Hao Zhang <quic_hazha@quicinc.com>
36+
37+
properties:
38+
compatible:
39+
enum:
40+
- arm,coresight-dummy-sink
41+
42+
in-ports:
43+
$ref: /schemas/graph.yaml#/properties/ports
44+
45+
properties:
46+
port:
47+
description: Input connection from the Coresight Trace bus to
48+
dummy sink, such as Embedded USB debugger(EUD).
49+
50+
$ref: /schemas/graph.yaml#/properties/port
51+
52+
required:
53+
- compatible
54+
- in-ports
55+
56+
additionalProperties: false
57+
58+
examples:
59+
# Minimum dummy sink definition. Dummy sink connect to coresight replicator.
60+
- |
61+
sink {
62+
compatible = "arm,coresight-dummy-sink";
63+
64+
in-ports {
65+
port {
66+
eud_in_replicator_swao: endpoint {
67+
remote-endpoint = <&replicator_swao_out_eud>;
68+
};
69+
};
70+
};
71+
};
72+
73+
...
Lines changed: 71 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,71 @@
1+
# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
2+
%YAML 1.2
3+
---
4+
$id: http://devicetree.org/schemas/arm/arm,coresight-dummy-source.yaml#
5+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+
title: ARM Coresight Dummy source component
8+
9+
description: |
10+
CoreSight components are compliant with the ARM CoreSight architecture
11+
specification and can be connected in various topologies to suit a particular
12+
SoCs tracing needs. These trace components can generally be classified as
13+
sinks, links and sources. Trace data produced by one or more sources flows
14+
through the intermediate links connecting the source to the currently selected
15+
sink.
16+
17+
The Coresight dummy source component is for the specific coresight source
18+
devices kernel don't have permission to access or configure. For some SOCs,
19+
there would be Coresight source trace components on sub-processor which
20+
are conneted to AP processor via debug bus. For these devices, a dummy driver
21+
is needed to register them as Coresight source devices, so that paths can be
22+
created in the driver. It provides Coresight API for operations on dummy
23+
source devices, such as enabling and disabling them. It also provides the
24+
Coresight dummy source paths for debugging.
25+
26+
The primary use case of the coresight dummy source is to build path in kernel
27+
side for dummy source component.
28+
29+
maintainers:
30+
- Mike Leach <mike.leach@linaro.org>
31+
- Suzuki K Poulose <suzuki.poulose@arm.com>
32+
- James Clark <james.clark@arm.com>
33+
- Mao Jinlong <quic_jinlmao@quicinc.com>
34+
- Hao Zhang <quic_hazha@quicinc.com>
35+
36+
properties:
37+
compatible:
38+
enum:
39+
- arm,coresight-dummy-source
40+
41+
out-ports:
42+
$ref: /schemas/graph.yaml#/properties/ports
43+
44+
properties:
45+
port:
46+
description: Output connection from the source to Coresight
47+
Trace bus.
48+
$ref: /schemas/graph.yaml#/properties/port
49+
50+
required:
51+
- compatible
52+
- out-ports
53+
54+
additionalProperties: false
55+
56+
examples:
57+
# Minimum dummy source definition. Dummy source connect to coresight funnel.
58+
- |
59+
source {
60+
compatible = "arm,coresight-dummy-source";
61+
62+
out-ports {
63+
port {
64+
dummy_riscv_out_funnel_swao: endpoint {
65+
remote-endpoint = <&funnel_swao_in_dummy_riscv>;
66+
};
67+
};
68+
};
69+
};
70+
71+
...

0 commit comments

Comments
 (0)