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tretterbebarino
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soc: xilinx: vcu: register PLL as fixed rate clock
Currently, xvcu_pll_set_rate configures the PLL to a clock rate that is pre-calculated when probing the driver. To still make the clock framework aware of the PLL and to allow to configure other clocks based on the PLL rate, register the PLL as a fixed rate clock. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Acked-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/20210121071659.1226489-8-m.tretter@pengutronix.de Signed-off-by: Stephen Boyd <sboyd@kernel.org>
1 parent f1bc982 commit 5a2b2e1

2 files changed

Lines changed: 19 additions & 2 deletions

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drivers/soc/xilinx/Kconfig

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@ menu "Xilinx SoC drivers"
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config XILINX_VCU
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tristate "Xilinx VCU logicoreIP Init"
6-
depends on HAS_IOMEM
6+
depends on HAS_IOMEM && COMMON_CLK
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select REGMAP_MMIO
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help
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Provides the driver to enable and disable the isolation between the

drivers/soc/xilinx/xlnx_vcu.c

Lines changed: 18 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@
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* Contacts Dhaval Shah <dshah@xilinx.com>
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*/
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#include <linux/clk.h>
10+
#include <linux/clk-provider.h>
1011
#include <linux/device.h>
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#include <linux/errno.h>
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#include <linux/io.h>
@@ -73,13 +74,15 @@
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* @aclk: axi clock source
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* @logicore_reg_ba: logicore reg base address
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* @vcu_slcr_ba: vcu_slcr Register base address
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* @pll: handle for the VCU PLL
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*/
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struct xvcu_device {
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struct device *dev;
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struct clk *pll_ref;
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struct clk *aclk;
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struct regmap *logicore_reg_ba;
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void __iomem *vcu_slcr_ba;
85+
struct clk_hw *pll;
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};
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8588
static struct regmap_config vcu_settings_regmap_config = {
@@ -403,7 +406,9 @@ static int xvcu_set_vcu_pll_info(struct xvcu_device *xvcu)
403406
u32 clkoutdiv, vcu_pll_ctrl, pll_clk;
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u32 mod, ctrl;
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int i;
409+
int ret;
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const struct xvcu_pll_cfg *found = NULL;
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struct clk_hw *hw;
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408413
regmap_read(xvcu->logicore_reg_ba, VCU_PLL_CLK, &inte);
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regmap_read(xvcu->logicore_reg_ba, VCU_PLL_CLK_DEC, &deci);
@@ -505,7 +510,18 @@ static int xvcu_set_vcu_pll_info(struct xvcu_device *xvcu)
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ctrl |= (VCU_SRCSEL_PLL & VCU_SRCSEL_MASK) << VCU_SRCSEL_SHIFT;
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xvcu_write(xvcu->vcu_slcr_ba, VCU_DEC_MCU_CTRL, ctrl);
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508-
return xvcu_pll_set_rate(xvcu, fvco, refclk);
513+
ret = xvcu_pll_set_rate(xvcu, fvco, refclk);
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if (ret)
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return ret;
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517+
hw = clk_hw_register_fixed_rate(xvcu->dev, "vcu_pll",
518+
__clk_get_name(xvcu->pll_ref),
519+
0, pll_clk);
520+
if (IS_ERR(hw))
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return PTR_ERR(hw);
522+
xvcu->pll = hw;
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524+
return 0;
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}
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511527
/**
@@ -652,6 +668,7 @@ static int xvcu_remove(struct platform_device *pdev)
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/* Add the the Gasket isolation and put the VCU in reset. */
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regmap_write(xvcu->logicore_reg_ba, VCU_GASKET_INIT, 0);
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671+
clk_hw_unregister_fixed_rate(xvcu->pll);
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xvcu_pll_disable(xvcu);
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clk_disable_unprepare(xvcu->aclk);
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