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Mangesh Gadrealexdeucher
Mangesh Gadre
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alexdeucher
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drm/amdgpu:Add psp v13_0_15 ip block
Add support for psp v13_0_15 ip block Signed-off-by: Mangesh Gadre <Mangesh.Gadre@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
1 parent 57d0081 commit 5e9aec4

4 files changed

Lines changed: 18 additions & 6 deletions

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‎drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2164,6 +2164,7 @@ static int amdgpu_discovery_set_psp_ip_blocks(struct amdgpu_device *adev)
21642164
case IP_VERSION(13, 0, 11):
21652165
case IP_VERSION(13, 0, 12):
21662166
case IP_VERSION(13, 0, 14):
2167+
case IP_VERSION(13, 0, 15):
21672168
case IP_VERSION(14, 0, 0):
21682169
case IP_VERSION(14, 0, 1):
21692170
case IP_VERSION(14, 0, 4):

‎drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -148,6 +148,7 @@ static int psp_init_sriov_microcode(struct psp_context *psp)
148148
break;
149149
case IP_VERSION(13, 0, 6):
150150
case IP_VERSION(13, 0, 14):
151+
case IP_VERSION(13, 0, 15):
151152
ret = psp_init_cap_microcode(psp, ucode_prefix);
152153
ret &= psp_init_ta_microcode(psp, ucode_prefix);
153154
break;
@@ -219,6 +220,7 @@ static int psp_early_init(struct amdgpu_ip_block *ip_block)
219220
psp->autoload_supported = false;
220221
break;
221222
case IP_VERSION(13, 0, 12):
223+
case IP_VERSION(13, 0, 15):
222224
psp_v13_0_set_psp_funcs(psp);
223225
psp->autoload_supported = false;
224226
adev->psp.sup_ifwi_up = !amdgpu_sriov_vf(adev);
@@ -383,7 +385,8 @@ static bool psp_get_runtime_db_entry(struct amdgpu_device *adev,
383385

384386
if (amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6) ||
385387
amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 12) ||
386-
amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14))
388+
amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14) ||
389+
amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 15))
387390
return false;
388391

389392
db_header_pos = adev->gmc.mc_vram_size - PSP_RUNTIME_DB_OFFSET;

‎drivers/gpu/drm/amd/amdgpu/psp_v13_0.c‎

Lines changed: 11 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -57,6 +57,8 @@ MODULE_FIRMWARE("amdgpu/psp_13_0_12_sos.bin");
5757
MODULE_FIRMWARE("amdgpu/psp_13_0_12_ta.bin");
5858
MODULE_FIRMWARE("amdgpu/psp_13_0_14_sos.bin");
5959
MODULE_FIRMWARE("amdgpu/psp_13_0_14_ta.bin");
60+
MODULE_FIRMWARE("amdgpu/psp_13_0_15_sos.bin");
61+
MODULE_FIRMWARE("amdgpu/psp_13_0_15_ta.bin");
6062
MODULE_FIRMWARE("amdgpu/psp_14_0_0_toc.bin");
6163
MODULE_FIRMWARE("amdgpu/psp_14_0_0_ta.bin");
6264
MODULE_FIRMWARE("amdgpu/psp_14_0_1_toc.bin");
@@ -121,6 +123,7 @@ static int psp_v13_0_init_microcode(struct psp_context *psp)
121123
case IP_VERSION(13, 0, 10):
122124
case IP_VERSION(13, 0, 12):
123125
case IP_VERSION(13, 0, 14):
126+
case IP_VERSION(13, 0, 15):
124127
err = psp_init_sos_microcode(psp, ucode_prefix);
125128
if (err)
126129
return err;
@@ -156,7 +159,8 @@ static void psp_v13_0_bootloader_print_status(struct psp_context *psp,
156159

157160
if (amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6) ||
158161
amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 12) ||
159-
amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14)) {
162+
amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14) ||
163+
amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 15)) {
160164
at = 0;
161165
for_each_inst(i, adev->aid_mask) {
162166
bl_status_reg =
@@ -202,7 +206,8 @@ static int psp_v13_0_wait_for_bootloader(struct psp_context *psp)
202206
retry_cnt =
203207
((amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6) ||
204208
amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 12) ||
205-
amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14))) ?
209+
amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14) ||
210+
amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 15))) ?
206211
PSP_VMBX_POLLING_LIMIT :
207212
10;
208213
/* Wait for bootloader to signify that it is ready having bit 31 of
@@ -232,7 +237,8 @@ static int psp_v13_0_wait_for_bootloader_steady_state(struct psp_context *psp)
232237

233238
if (amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6) ||
234239
amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 12) ||
235-
amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14)) {
240+
amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14) ||
241+
amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 15)) {
236242
ret = psp_v13_0_wait_for_vmbx_ready(psp);
237243
if (ret)
238244
amdgpu_ras_query_boot_status(adev, 4);
@@ -872,7 +878,8 @@ static bool psp_v13_0_get_ras_capability(struct psp_context *psp)
872878

873879
if ((amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6) ||
874880
amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 12) ||
875-
amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14)) &&
881+
amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14) ||
882+
amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 15)) &&
876883
(!(adev->flags & AMD_IS_APU))) {
877884
reg_data = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_127);
878885
adev->ras_hw_enabled = (reg_data & GENMASK_ULL(23, 0));

‎drivers/gpu/drm/amd/amdgpu/soc15.c‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1478,7 +1478,8 @@ static void soc15_common_get_clockgating_state(struct amdgpu_ip_block *ip_block,
14781478
if ((amdgpu_ip_version(adev, MP0_HWIP, 0) != IP_VERSION(13, 0, 2)) &&
14791479
(amdgpu_ip_version(adev, MP0_HWIP, 0) != IP_VERSION(13, 0, 6)) &&
14801480
(amdgpu_ip_version(adev, MP0_HWIP, 0) != IP_VERSION(13, 0, 12)) &&
1481-
(amdgpu_ip_version(adev, MP0_HWIP, 0) != IP_VERSION(13, 0, 14))) {
1481+
(amdgpu_ip_version(adev, MP0_HWIP, 0) != IP_VERSION(13, 0, 14)) &&
1482+
(amdgpu_ip_version(adev, MP0_HWIP, 0) != IP_VERSION(13, 0, 15))) {
14821483
/* AMD_CG_SUPPORT_DRM_MGCG */
14831484
data = RREG32(SOC15_REG_OFFSET(MP0, 0, mmMP0_MISC_CGTT_CTRL0));
14841485
if (!(data & 0x01000000))

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