Skip to content

Commit 5f38ac5

Browse files
Kenneth Fengalexdeucher
Kenneth Feng
authored and
alexdeucher
committed
drm/amd/pm: fix the high voltage and temperature issue
fix the high voltage and temperature issue after the driver is unloaded on smu 13.0.0, smu 13.0.7 and smu 13.0.10 v2 - fix the code format and make sure it is used on the unload case only. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
1 parent a17f574 commit 5f38ac5

7 files changed

Lines changed: 94 additions & 15 deletions

File tree

‎drivers/gpu/drm/amd/amdgpu/amdgpu_device.c‎

Lines changed: 17 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -3962,13 +3962,23 @@ int amdgpu_device_init(struct amdgpu_device *adev,
39623962
}
39633963
}
39643964
} else {
3965-
tmp = amdgpu_reset_method;
3966-
/* It should do a default reset when loading or reloading the driver,
3967-
* regardless of the module parameter reset_method.
3968-
*/
3969-
amdgpu_reset_method = AMD_RESET_METHOD_NONE;
3970-
r = amdgpu_asic_reset(adev);
3971-
amdgpu_reset_method = tmp;
3965+
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
3966+
case IP_VERSION(13, 0, 0):
3967+
case IP_VERSION(13, 0, 7):
3968+
case IP_VERSION(13, 0, 10):
3969+
r = psp_gpu_reset(adev);
3970+
break;
3971+
default:
3972+
tmp = amdgpu_reset_method;
3973+
/* It should do a default reset when loading or reloading the driver,
3974+
* regardless of the module parameter reset_method.
3975+
*/
3976+
amdgpu_reset_method = AMD_RESET_METHOD_NONE;
3977+
r = amdgpu_asic_reset(adev);
3978+
amdgpu_reset_method = tmp;
3979+
break;
3980+
}
3981+
39723982
if (r) {
39733983
dev_err(adev->dev, "asic reset on init failed\n");
39743984
goto failed;

‎drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c‎

Lines changed: 31 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -733,7 +733,7 @@ static int smu_early_init(void *handle)
733733
smu->adev = adev;
734734
smu->pm_enabled = !!amdgpu_dpm;
735735
smu->is_apu = false;
736-
smu->smu_baco.state = SMU_BACO_STATE_EXIT;
736+
smu->smu_baco.state = SMU_BACO_STATE_NONE;
737737
smu->smu_baco.platform_support = false;
738738
smu->user_dpm_profile.fan_mode = -1;
739739

@@ -1742,10 +1742,31 @@ static int smu_smc_hw_cleanup(struct smu_context *smu)
17421742
return 0;
17431743
}
17441744

1745+
static int smu_reset_mp1_state(struct smu_context *smu)
1746+
{
1747+
struct amdgpu_device *adev = smu->adev;
1748+
int ret = 0;
1749+
1750+
if ((!adev->in_runpm) && (!adev->in_suspend) &&
1751+
(!amdgpu_in_reset(adev)))
1752+
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
1753+
case IP_VERSION(13, 0, 0):
1754+
case IP_VERSION(13, 0, 7):
1755+
case IP_VERSION(13, 0, 10):
1756+
ret = smu_set_mp1_state(smu, PP_MP1_STATE_UNLOAD);
1757+
break;
1758+
default:
1759+
break;
1760+
}
1761+
1762+
return ret;
1763+
}
1764+
17451765
static int smu_hw_fini(void *handle)
17461766
{
17471767
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
17481768
struct smu_context *smu = adev->powerplay.pp_handle;
1769+
int ret;
17491770

17501771
if (amdgpu_sriov_vf(adev) && !amdgpu_sriov_is_pp_one_vf(adev))
17511772
return 0;
@@ -1763,7 +1784,15 @@ static int smu_hw_fini(void *handle)
17631784

17641785
adev->pm.dpm_enabled = false;
17651786

1766-
return smu_smc_hw_cleanup(smu);
1787+
ret = smu_smc_hw_cleanup(smu);
1788+
if (ret)
1789+
return ret;
1790+
1791+
ret = smu_reset_mp1_state(smu);
1792+
if (ret)
1793+
return ret;
1794+
1795+
return 0;
17671796
}
17681797

17691798
static void smu_late_fini(void *handle)

‎drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -419,6 +419,7 @@ enum smu_reset_mode {
419419
enum smu_baco_state {
420420
SMU_BACO_STATE_ENTER = 0,
421421
SMU_BACO_STATE_EXIT,
422+
SMU_BACO_STATE_NONE,
422423
};
423424

424425
struct smu_baco_context {

‎drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -299,5 +299,7 @@ int smu_v13_0_update_pcie_parameters(struct smu_context *smu,
299299
uint8_t pcie_gen_cap,
300300
uint8_t pcie_width_cap);
301301

302+
int smu_v13_0_disable_pmfw_state(struct smu_context *smu);
303+
302304
#endif
303305
#endif

‎drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c‎

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2477,3 +2477,16 @@ int smu_v13_0_update_pcie_parameters(struct smu_context *smu,
24772477

24782478
return 0;
24792479
}
2480+
2481+
int smu_v13_0_disable_pmfw_state(struct smu_context *smu)
2482+
{
2483+
int ret;
2484+
struct amdgpu_device *adev = smu->adev;
2485+
2486+
WREG32_PCIE(MP1_Public | (smnMP1_FIRMWARE_FLAGS & 0xffffffff), 0);
2487+
2488+
ret = RREG32_PCIE(MP1_Public |
2489+
(smnMP1_FIRMWARE_FLAGS & 0xffffffff));
2490+
2491+
return ret == 0 ? 0 : -EINVAL;
2492+
}

‎drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c‎

Lines changed: 15 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2602,14 +2602,20 @@ static int smu_v13_0_0_baco_enter(struct smu_context *smu)
26022602
static int smu_v13_0_0_baco_exit(struct smu_context *smu)
26032603
{
26042604
struct amdgpu_device *adev = smu->adev;
2605+
int ret;
26052606

26062607
if (adev->in_runpm && smu_cmn_is_audio_func_enabled(adev)) {
26072608
/* Wait for PMFW handling for the Dstate change */
26082609
usleep_range(10000, 11000);
2609-
return smu_v13_0_baco_set_armd3_sequence(smu, BACO_SEQ_ULPS);
2610+
ret = smu_v13_0_baco_set_armd3_sequence(smu, BACO_SEQ_ULPS);
26102611
} else {
2611-
return smu_v13_0_baco_exit(smu);
2612+
ret = smu_v13_0_baco_exit(smu);
26122613
}
2614+
2615+
if (!ret)
2616+
adev->gfx.is_poweron = false;
2617+
2618+
return ret;
26132619
}
26142620

26152621
static bool smu_v13_0_0_is_mode1_reset_supported(struct smu_context *smu)
@@ -2794,7 +2800,13 @@ static int smu_v13_0_0_set_mp1_state(struct smu_context *smu,
27942800

27952801
switch (mp1_state) {
27962802
case PP_MP1_STATE_UNLOAD:
2797-
ret = smu_cmn_set_mp1_state(smu, mp1_state);
2803+
ret = smu_cmn_send_smc_msg_with_param(smu,
2804+
SMU_MSG_PrepareMp1ForUnload,
2805+
0x55, NULL);
2806+
2807+
if (!ret && smu->smu_baco.state == SMU_BACO_STATE_EXIT)
2808+
ret = smu_v13_0_disable_pmfw_state(smu);
2809+
27982810
break;
27992811
default:
28002812
/* Ignore others */

‎drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c‎

Lines changed: 15 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2498,7 +2498,13 @@ static int smu_v13_0_7_set_mp1_state(struct smu_context *smu,
24982498

24992499
switch (mp1_state) {
25002500
case PP_MP1_STATE_UNLOAD:
2501-
ret = smu_cmn_set_mp1_state(smu, mp1_state);
2501+
ret = smu_cmn_send_smc_msg_with_param(smu,
2502+
SMU_MSG_PrepareMp1ForUnload,
2503+
0x55, NULL);
2504+
2505+
if (!ret && smu->smu_baco.state == SMU_BACO_STATE_EXIT)
2506+
ret = smu_v13_0_disable_pmfw_state(smu);
2507+
25022508
break;
25032509
default:
25042510
/* Ignore others */
@@ -2524,14 +2530,20 @@ static int smu_v13_0_7_baco_enter(struct smu_context *smu)
25242530
static int smu_v13_0_7_baco_exit(struct smu_context *smu)
25252531
{
25262532
struct amdgpu_device *adev = smu->adev;
2533+
int ret;
25272534

25282535
if (adev->in_runpm && smu_cmn_is_audio_func_enabled(adev)) {
25292536
/* Wait for PMFW handling for the Dstate change */
25302537
usleep_range(10000, 11000);
2531-
return smu_v13_0_baco_set_armd3_sequence(smu, BACO_SEQ_ULPS);
2538+
ret = smu_v13_0_baco_set_armd3_sequence(smu, BACO_SEQ_ULPS);
25322539
} else {
2533-
return smu_v13_0_baco_exit(smu);
2540+
ret = smu_v13_0_baco_exit(smu);
25342541
}
2542+
2543+
if (!ret)
2544+
adev->gfx.is_poweron = false;
2545+
2546+
return ret;
25352547
}
25362548

25372549
static bool smu_v13_0_7_is_mode1_reset_supported(struct smu_context *smu)

0 commit comments

Comments
 (0)