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26 | 26 | #ifndef __DC_TIMING_GENERATOR_DCN10_H__ |
27 | 27 | #define __DC_TIMING_GENERATOR_DCN10_H__ |
28 | 28 |
|
29 | | -#include "timing_generator.h" |
| 29 | +#include "optc.h" |
30 | 30 |
|
31 | 31 | #define DCN10TG_FROM_TG(tg)\ |
32 | 32 | container_of(tg, struct optc, base) |
@@ -594,190 +594,6 @@ struct dcn_optc_mask { |
594 | 594 | TG_REG_FIELD_LIST_DCN3_5(uint32_t) |
595 | 595 | }; |
596 | 596 |
|
597 | | -struct optc { |
598 | | - struct timing_generator base; |
599 | | - |
600 | | - const struct dcn_optc_registers *tg_regs; |
601 | | - const struct dcn_optc_shift *tg_shift; |
602 | | - const struct dcn_optc_mask *tg_mask; |
603 | | - |
604 | | - int opp_count; |
605 | | - |
606 | | - uint32_t max_h_total; |
607 | | - uint32_t max_v_total; |
608 | | - |
609 | | - uint32_t min_h_blank; |
610 | | - |
611 | | - uint32_t min_h_sync_width; |
612 | | - uint32_t min_v_sync_width; |
613 | | - uint32_t min_v_blank; |
614 | | - uint32_t min_v_blank_interlace; |
615 | | - |
616 | | - int vstartup_start; |
617 | | - int vupdate_offset; |
618 | | - int vupdate_width; |
619 | | - int vready_offset; |
620 | | - struct dc_crtc_timing orginal_patched_timing; |
621 | | - enum signal_type signal; |
622 | | -}; |
623 | | - |
624 | 597 | void dcn10_timing_generator_init(struct optc *optc); |
625 | 598 |
|
626 | | -struct dcn_otg_state { |
627 | | - uint32_t v_blank_start; |
628 | | - uint32_t v_blank_end; |
629 | | - uint32_t v_sync_a_pol; |
630 | | - uint32_t v_total; |
631 | | - uint32_t v_total_max; |
632 | | - uint32_t v_total_min; |
633 | | - uint32_t v_total_min_sel; |
634 | | - uint32_t v_total_max_sel; |
635 | | - uint32_t v_sync_a_start; |
636 | | - uint32_t v_sync_a_end; |
637 | | - uint32_t h_blank_start; |
638 | | - uint32_t h_blank_end; |
639 | | - uint32_t h_sync_a_start; |
640 | | - uint32_t h_sync_a_end; |
641 | | - uint32_t h_sync_a_pol; |
642 | | - uint32_t h_total; |
643 | | - uint32_t underflow_occurred_status; |
644 | | - uint32_t otg_enabled; |
645 | | - uint32_t blank_enabled; |
646 | | - uint32_t vertical_interrupt1_en; |
647 | | - uint32_t vertical_interrupt1_line; |
648 | | - uint32_t vertical_interrupt2_en; |
649 | | - uint32_t vertical_interrupt2_line; |
650 | | -}; |
651 | | - |
652 | | -void optc1_read_otg_state(struct optc *optc1, |
653 | | - struct dcn_otg_state *s); |
654 | | - |
655 | | -bool optc1_get_hw_timing(struct timing_generator *tg, |
656 | | - struct dc_crtc_timing *hw_crtc_timing); |
657 | | - |
658 | | -bool optc1_validate_timing( |
659 | | - struct timing_generator *optc, |
660 | | - const struct dc_crtc_timing *timing); |
661 | | - |
662 | | -void optc1_program_timing( |
663 | | - struct timing_generator *optc, |
664 | | - const struct dc_crtc_timing *dc_crtc_timing, |
665 | | - int vready_offset, |
666 | | - int vstartup_start, |
667 | | - int vupdate_offset, |
668 | | - int vupdate_width, |
669 | | - const enum signal_type signal, |
670 | | - bool use_vbios); |
671 | | - |
672 | | -void optc1_setup_vertical_interrupt0( |
673 | | - struct timing_generator *optc, |
674 | | - uint32_t start_line, |
675 | | - uint32_t end_line); |
676 | | -void optc1_setup_vertical_interrupt1( |
677 | | - struct timing_generator *optc, |
678 | | - uint32_t start_line); |
679 | | -void optc1_setup_vertical_interrupt2( |
680 | | - struct timing_generator *optc, |
681 | | - uint32_t start_line); |
682 | | - |
683 | | -void optc1_program_global_sync( |
684 | | - struct timing_generator *optc, |
685 | | - int vready_offset, |
686 | | - int vstartup_start, |
687 | | - int vupdate_offset, |
688 | | - int vupdate_width); |
689 | | - |
690 | | -bool optc1_disable_crtc(struct timing_generator *optc); |
691 | | - |
692 | | -bool optc1_is_counter_moving(struct timing_generator *optc); |
693 | | - |
694 | | -void optc1_get_position(struct timing_generator *optc, |
695 | | - struct crtc_position *position); |
696 | | - |
697 | | -uint32_t optc1_get_vblank_counter(struct timing_generator *optc); |
698 | | - |
699 | | -void optc1_get_crtc_scanoutpos( |
700 | | - struct timing_generator *optc, |
701 | | - uint32_t *v_blank_start, |
702 | | - uint32_t *v_blank_end, |
703 | | - uint32_t *h_position, |
704 | | - uint32_t *v_position); |
705 | | - |
706 | | -void optc1_set_early_control( |
707 | | - struct timing_generator *optc, |
708 | | - uint32_t early_cntl); |
709 | | - |
710 | | -void optc1_wait_for_state(struct timing_generator *optc, |
711 | | - enum crtc_state state); |
712 | | - |
713 | | -void optc1_set_blank(struct timing_generator *optc, |
714 | | - bool enable_blanking); |
715 | | - |
716 | | -bool optc1_is_blanked(struct timing_generator *optc); |
717 | | - |
718 | | -void optc1_program_blank_color( |
719 | | - struct timing_generator *optc, |
720 | | - const struct tg_color *black_color); |
721 | | - |
722 | | -bool optc1_did_triggered_reset_occur( |
723 | | - struct timing_generator *optc); |
724 | | - |
725 | | -void optc1_enable_reset_trigger(struct timing_generator *optc, int source_tg_inst); |
726 | | - |
727 | | -void optc1_disable_reset_trigger(struct timing_generator *optc); |
728 | | - |
729 | | -void optc1_lock(struct timing_generator *optc); |
730 | | - |
731 | | -void optc1_unlock(struct timing_generator *optc); |
732 | | - |
733 | | -void optc1_enable_optc_clock(struct timing_generator *optc, bool enable); |
734 | | - |
735 | | -void optc1_set_drr( |
736 | | - struct timing_generator *optc, |
737 | | - const struct drr_params *params); |
738 | | - |
739 | | -void optc1_set_vtotal_min_max(struct timing_generator *optc, int vtotal_min, int vtotal_max); |
740 | | - |
741 | | -void optc1_set_static_screen_control( |
742 | | - struct timing_generator *optc, |
743 | | - uint32_t event_triggers, |
744 | | - uint32_t num_frames); |
745 | | - |
746 | | -void optc1_program_stereo(struct timing_generator *optc, |
747 | | - const struct dc_crtc_timing *timing, struct crtc_stereo_flags *flags); |
748 | | - |
749 | | -bool optc1_is_stereo_left_eye(struct timing_generator *optc); |
750 | | - |
751 | | -void optc1_clear_optc_underflow(struct timing_generator *optc); |
752 | | - |
753 | | -void optc1_tg_init(struct timing_generator *optc); |
754 | | - |
755 | | -bool optc1_is_tg_enabled(struct timing_generator *optc); |
756 | | - |
757 | | -bool optc1_is_optc_underflow_occurred(struct timing_generator *optc); |
758 | | - |
759 | | -void optc1_set_blank_data_double_buffer(struct timing_generator *optc, bool enable); |
760 | | - |
761 | | -void optc1_set_timing_double_buffer(struct timing_generator *optc, bool enable); |
762 | | - |
763 | | -bool optc1_get_otg_active_size(struct timing_generator *optc, |
764 | | - uint32_t *otg_active_width, |
765 | | - uint32_t *otg_active_height); |
766 | | - |
767 | | -void optc1_enable_crtc_reset( |
768 | | - struct timing_generator *optc, |
769 | | - int source_tg_inst, |
770 | | - struct crtc_trigger_info *crtc_tp); |
771 | | - |
772 | | -bool optc1_configure_crc(struct timing_generator *optc, |
773 | | - const struct crc_params *params); |
774 | | - |
775 | | -bool optc1_get_crc(struct timing_generator *optc, |
776 | | - uint32_t *r_cr, uint32_t *g_y, uint32_t *b_cb); |
777 | | - |
778 | | -bool optc1_is_two_pixels_per_containter(const struct dc_crtc_timing *timing); |
779 | | - |
780 | | -void optc1_set_vtg_params(struct timing_generator *optc, |
781 | | - const struct dc_crtc_timing *dc_crtc_timing, bool program_fp2); |
782 | | - |
783 | 599 | #endif /* __DC_TIMING_GENERATOR_DCN10_H__ */ |
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