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Rodrigo Siqueiraalexdeucher
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drm/amd/display: Create optc.h file
For all the components that participate in DCN architecture, there is a header in the dc/inch/hw. For some reason, OPTC broke this pattern and added all the primary functions/structs associated with that in the dcn10_optc.h file. For consistency's sake, this commit introduces a new optc.h file and extracts the code from dcn10_optc to this new file. Reviewed-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Acked-by: Hersen Wu <hersenxs.wu@amd.com> Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
1 parent 3e18d4b commit 60ccd58

3 files changed

Lines changed: 221 additions & 186 deletions

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drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -37,7 +37,7 @@
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#include <drm/drm_framebuffer.h>
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#include <drm/drm_encoder.h>
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#include <drm/drm_atomic.h>
40-
#include "dcn10/dcn10_optc.h"
40+
#include "dc/inc/hw/optc.h"
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#include "dc/inc/core_types.h"
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drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h

Lines changed: 1 addition & 185 deletions
Original file line numberDiff line numberDiff line change
@@ -26,7 +26,7 @@
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#ifndef __DC_TIMING_GENERATOR_DCN10_H__
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#define __DC_TIMING_GENERATOR_DCN10_H__
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29-
#include "timing_generator.h"
29+
#include "optc.h"
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#define DCN10TG_FROM_TG(tg)\
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container_of(tg, struct optc, base)
@@ -594,190 +594,6 @@ struct dcn_optc_mask {
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TG_REG_FIELD_LIST_DCN3_5(uint32_t)
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};
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597-
struct optc {
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struct timing_generator base;
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const struct dcn_optc_registers *tg_regs;
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const struct dcn_optc_shift *tg_shift;
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const struct dcn_optc_mask *tg_mask;
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int opp_count;
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uint32_t max_h_total;
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uint32_t max_v_total;
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uint32_t min_h_blank;
610-
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uint32_t min_h_sync_width;
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uint32_t min_v_sync_width;
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uint32_t min_v_blank;
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uint32_t min_v_blank_interlace;
615-
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int vstartup_start;
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int vupdate_offset;
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int vupdate_width;
619-
int vready_offset;
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struct dc_crtc_timing orginal_patched_timing;
621-
enum signal_type signal;
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};
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624597
void dcn10_timing_generator_init(struct optc *optc);
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626-
struct dcn_otg_state {
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uint32_t v_blank_start;
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uint32_t v_blank_end;
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uint32_t v_sync_a_pol;
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uint32_t v_total;
631-
uint32_t v_total_max;
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uint32_t v_total_min;
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uint32_t v_total_min_sel;
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uint32_t v_total_max_sel;
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uint32_t v_sync_a_start;
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uint32_t v_sync_a_end;
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uint32_t h_blank_start;
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uint32_t h_blank_end;
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uint32_t h_sync_a_start;
640-
uint32_t h_sync_a_end;
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uint32_t h_sync_a_pol;
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uint32_t h_total;
643-
uint32_t underflow_occurred_status;
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uint32_t otg_enabled;
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uint32_t blank_enabled;
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uint32_t vertical_interrupt1_en;
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uint32_t vertical_interrupt1_line;
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uint32_t vertical_interrupt2_en;
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uint32_t vertical_interrupt2_line;
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};
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void optc1_read_otg_state(struct optc *optc1,
653-
struct dcn_otg_state *s);
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bool optc1_get_hw_timing(struct timing_generator *tg,
656-
struct dc_crtc_timing *hw_crtc_timing);
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bool optc1_validate_timing(
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struct timing_generator *optc,
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const struct dc_crtc_timing *timing);
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void optc1_program_timing(
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struct timing_generator *optc,
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const struct dc_crtc_timing *dc_crtc_timing,
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int vready_offset,
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int vstartup_start,
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int vupdate_offset,
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int vupdate_width,
669-
const enum signal_type signal,
670-
bool use_vbios);
671-
672-
void optc1_setup_vertical_interrupt0(
673-
struct timing_generator *optc,
674-
uint32_t start_line,
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uint32_t end_line);
676-
void optc1_setup_vertical_interrupt1(
677-
struct timing_generator *optc,
678-
uint32_t start_line);
679-
void optc1_setup_vertical_interrupt2(
680-
struct timing_generator *optc,
681-
uint32_t start_line);
682-
683-
void optc1_program_global_sync(
684-
struct timing_generator *optc,
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int vready_offset,
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int vstartup_start,
687-
int vupdate_offset,
688-
int vupdate_width);
689-
690-
bool optc1_disable_crtc(struct timing_generator *optc);
691-
692-
bool optc1_is_counter_moving(struct timing_generator *optc);
693-
694-
void optc1_get_position(struct timing_generator *optc,
695-
struct crtc_position *position);
696-
697-
uint32_t optc1_get_vblank_counter(struct timing_generator *optc);
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699-
void optc1_get_crtc_scanoutpos(
700-
struct timing_generator *optc,
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uint32_t *v_blank_start,
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uint32_t *v_blank_end,
703-
uint32_t *h_position,
704-
uint32_t *v_position);
705-
706-
void optc1_set_early_control(
707-
struct timing_generator *optc,
708-
uint32_t early_cntl);
709-
710-
void optc1_wait_for_state(struct timing_generator *optc,
711-
enum crtc_state state);
712-
713-
void optc1_set_blank(struct timing_generator *optc,
714-
bool enable_blanking);
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bool optc1_is_blanked(struct timing_generator *optc);
717-
718-
void optc1_program_blank_color(
719-
struct timing_generator *optc,
720-
const struct tg_color *black_color);
721-
722-
bool optc1_did_triggered_reset_occur(
723-
struct timing_generator *optc);
724-
725-
void optc1_enable_reset_trigger(struct timing_generator *optc, int source_tg_inst);
726-
727-
void optc1_disable_reset_trigger(struct timing_generator *optc);
728-
729-
void optc1_lock(struct timing_generator *optc);
730-
731-
void optc1_unlock(struct timing_generator *optc);
732-
733-
void optc1_enable_optc_clock(struct timing_generator *optc, bool enable);
734-
735-
void optc1_set_drr(
736-
struct timing_generator *optc,
737-
const struct drr_params *params);
738-
739-
void optc1_set_vtotal_min_max(struct timing_generator *optc, int vtotal_min, int vtotal_max);
740-
741-
void optc1_set_static_screen_control(
742-
struct timing_generator *optc,
743-
uint32_t event_triggers,
744-
uint32_t num_frames);
745-
746-
void optc1_program_stereo(struct timing_generator *optc,
747-
const struct dc_crtc_timing *timing, struct crtc_stereo_flags *flags);
748-
749-
bool optc1_is_stereo_left_eye(struct timing_generator *optc);
750-
751-
void optc1_clear_optc_underflow(struct timing_generator *optc);
752-
753-
void optc1_tg_init(struct timing_generator *optc);
754-
755-
bool optc1_is_tg_enabled(struct timing_generator *optc);
756-
757-
bool optc1_is_optc_underflow_occurred(struct timing_generator *optc);
758-
759-
void optc1_set_blank_data_double_buffer(struct timing_generator *optc, bool enable);
760-
761-
void optc1_set_timing_double_buffer(struct timing_generator *optc, bool enable);
762-
763-
bool optc1_get_otg_active_size(struct timing_generator *optc,
764-
uint32_t *otg_active_width,
765-
uint32_t *otg_active_height);
766-
767-
void optc1_enable_crtc_reset(
768-
struct timing_generator *optc,
769-
int source_tg_inst,
770-
struct crtc_trigger_info *crtc_tp);
771-
772-
bool optc1_configure_crc(struct timing_generator *optc,
773-
const struct crc_params *params);
774-
775-
bool optc1_get_crc(struct timing_generator *optc,
776-
uint32_t *r_cr, uint32_t *g_y, uint32_t *b_cb);
777-
778-
bool optc1_is_two_pixels_per_containter(const struct dc_crtc_timing *timing);
779-
780-
void optc1_set_vtg_params(struct timing_generator *optc,
781-
const struct dc_crtc_timing *dc_crtc_timing, bool program_fp2);
782-
783599
#endif /* __DC_TIMING_GENERATOR_DCN10_H__ */

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