Skip to content

Commit 65a2400

Browse files
superm1alexdeucher
authored andcommitted
drm/amd: Fix initialization for nbio 7.5.1
A mistake has been made in the BIOS for some ASICs with NBIO 7.5.1 where some NBIO registers aren't properly setup. Ensure that they're set during initialization. Tested-by: Richard Gong <richard.gong@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 6.1.x
1 parent c76e483 commit 65a2400

1 file changed

Lines changed: 5 additions & 0 deletions

File tree

drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -382,6 +382,11 @@ static void nbio_v7_2_init_registers(struct amdgpu_device *adev)
382382
if (def != data)
383383
WREG32_PCIE_PORT(SOC15_REG_OFFSET(NBIO, 0, regBIF1_PCIE_MST_CTRL_3), data);
384384
break;
385+
case IP_VERSION(7, 5, 1):
386+
data = RREG32_SOC15(NBIO, 0, regRCC_DEV2_EPF0_STRAP2);
387+
data &= ~RCC_DEV2_EPF0_STRAP2__STRAP_NO_SOFT_RESET_DEV2_F0_MASK;
388+
WREG32_SOC15(NBIO, 0, regRCC_DEV2_EPF0_STRAP2, data);
389+
fallthrough;
385390
default:
386391
def = data = RREG32_PCIE_PORT(SOC15_REG_OFFSET(NBIO, 0, regPCIE_CONFIG_CNTL));
387392
data = REG_SET_FIELD(data, PCIE_CONFIG_CNTL,

0 commit comments

Comments
 (0)