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Merge tag 'imx-fixes-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 6.4: - A couple of i.MX8MN/P video clock changes from Adam Ford to fix issue with clock re-parenting. - Add missing pvcie-supply regulator for imx6qdl-mba6 board. - A series of colibri-imx8x board fixes on pin configuration. - Set and limit the mode for PMIC bucks for imx6ull-dhcor board to fix stability problems. - A couple of changes from Frank Li to correct cdns,usb3 bindings cdns,on-chip-buff-size property and fix USB 3.0 gadget failure on i.MX8QM & QXPB0. - Add a required PHY deassert delay for imx8mn-var-som board to fix PHY detection failure. * tag 'imx-fixes-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: dts: imx8: fix USB 3.0 Gadget Failure in QM & QXPB0 at super speed dt-binding: cdns,usb3: Fix cdns,on-chip-buff-size type arm64: dts: colibri-imx8x: delete adc1 and dsp arm64: dts: colibri-imx8x: fix iris pinctrl configuration arm64: dts: colibri-imx8x: move pinctrl property from SoM to eval board arm64: dts: colibri-imx8x: fix eval board pin configuration arm64: dts: imx8mp: Fix video clock parents ARM: dts: imx6qdl-mba6: Add missing pvcie-supply regulator ARM: dts: imx6ull-dhcor: Set and limit the mode for PMIC buck 1, 2 and 3 arm64: dts: imx8mn-var-som: fix PHY detection bug by adding deassert delay arm64: dts: imx8mn: Fix video clock parents Link: https://lore.kernel.org/r/20230516133625.GI767028@dragon Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 parents 0bfa36f + 0f554e3 commit 66bbb32

10 files changed

Lines changed: 56 additions & 39 deletions

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‎Documentation/devicetree/bindings/usb/cdns,usb3.yaml‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -64,7 +64,7 @@ properties:
6464
description:
6565
size of memory intended as internal memory for endpoints
6666
buffers expressed in KB
67-
$ref: /schemas/types.yaml#/definitions/uint32
67+
$ref: /schemas/types.yaml#/definitions/uint16
6868

6969
cdns,phyrst-a-enable:
7070
description: Enable resetting of PHY if Rx fail is detected

‎arch/arm/boot/dts/imx6qdl-mba6.dtsi‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -209,6 +209,7 @@
209209
pinctrl-names = "default";
210210
pinctrl-0 = <&pinctrl_pcie>;
211211
reset-gpio = <&gpio6 7 GPIO_ACTIVE_LOW>;
212+
vpcie-supply = <&reg_pcie>;
212213
status = "okay";
213214
};
214215

‎arch/arm/boot/dts/imx6ull-dhcor-som.dtsi‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,7 @@
88
#include <dt-bindings/input/input.h>
99
#include <dt-bindings/leds/common.h>
1010
#include <dt-bindings/pwm/pwm.h>
11+
#include <dt-bindings/regulator/dlg,da9063-regulator.h>
1112
#include "imx6ull.dtsi"
1213

1314
/ {
@@ -84,16 +85,20 @@
8485

8586
regulators {
8687
vdd_soc_in_1v4: buck1 {
88+
regulator-allowed-modes = <DA9063_BUCK_MODE_SLEEP>; /* PFM */
8789
regulator-always-on;
8890
regulator-boot-on;
91+
regulator-initial-mode = <DA9063_BUCK_MODE_SLEEP>;
8992
regulator-max-microvolt = <1400000>;
9093
regulator-min-microvolt = <1400000>;
9194
regulator-name = "vdd_soc_in_1v4";
9295
};
9396

9497
vcc_3v3: buck2 {
98+
regulator-allowed-modes = <DA9063_BUCK_MODE_SYNC>; /* PWM */
9599
regulator-always-on;
96100
regulator-boot-on;
101+
regulator-initial-mode = <DA9063_BUCK_MODE_SYNC>;
97102
regulator-max-microvolt = <3300000>;
98103
regulator-min-microvolt = <3300000>;
99104
regulator-name = "vcc_3v3";
@@ -106,8 +111,10 @@
106111
* the voltage is set to 1.5V.
107112
*/
108113
vcc_ddr_1v35: buck3 {
114+
regulator-allowed-modes = <DA9063_BUCK_MODE_SYNC>; /* PWM */
109115
regulator-always-on;
110116
regulator-boot-on;
117+
regulator-initial-mode = <DA9063_BUCK_MODE_SYNC>;
111118
regulator-max-microvolt = <1500000>;
112119
regulator-min-microvolt = <1500000>;
113120
regulator-name = "vcc_ddr_1v35";

‎arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -171,6 +171,7 @@ conn_subsys: bus@5b000000 {
171171
interrupt-names = "host", "peripheral", "otg", "wakeup";
172172
phys = <&usb3_phy>;
173173
phy-names = "cdns3,usb3-phy";
174+
cdns,on-chip-buff-size = /bits/ 16 <18>;
174175
status = "disabled";
175176
};
176177
};

‎arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi‎

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -98,11 +98,17 @@
9898
#address-cells = <1>;
9999
#size-cells = <0>;
100100

101-
ethphy: ethernet-phy@4 {
101+
ethphy: ethernet-phy@4 { /* AR8033 or ADIN1300 */
102102
compatible = "ethernet-phy-ieee802.3-c22";
103103
reg = <4>;
104104
reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
105105
reset-assert-us = <10000>;
106+
/*
107+
* Deassert delay:
108+
* ADIN1300 requires 5ms.
109+
* AR8033 requires 1ms.
110+
*/
111+
reset-deassert-us = <20000>;
106112
};
107113
};
108114
};

‎arch/arm64/boot/dts/freescale/imx8mn.dtsi‎

Lines changed: 15 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -1069,13 +1069,6 @@
10691069
<&clk IMX8MN_CLK_DISP_APB_ROOT>,
10701070
<&clk IMX8MN_CLK_DISP_AXI_ROOT>;
10711071
clock-names = "pix", "axi", "disp_axi";
1072-
assigned-clocks = <&clk IMX8MN_CLK_DISP_PIXEL_ROOT>,
1073-
<&clk IMX8MN_CLK_DISP_AXI>,
1074-
<&clk IMX8MN_CLK_DISP_APB>;
1075-
assigned-clock-parents = <&clk IMX8MN_CLK_DISP_PIXEL>,
1076-
<&clk IMX8MN_SYS_PLL2_1000M>,
1077-
<&clk IMX8MN_SYS_PLL1_800M>;
1078-
assigned-clock-rates = <594000000>, <500000000>, <200000000>;
10791072
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
10801073
power-domains = <&disp_blk_ctrl IMX8MN_DISPBLK_PD_LCDIF>;
10811074
status = "disabled";
@@ -1093,12 +1086,6 @@
10931086
clocks = <&clk IMX8MN_CLK_DSI_CORE>,
10941087
<&clk IMX8MN_CLK_DSI_PHY_REF>;
10951088
clock-names = "bus_clk", "sclk_mipi";
1096-
assigned-clocks = <&clk IMX8MN_CLK_DSI_CORE>,
1097-
<&clk IMX8MN_CLK_DSI_PHY_REF>;
1098-
assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_266M>,
1099-
<&clk IMX8MN_CLK_24M>;
1100-
assigned-clock-rates = <266000000>, <24000000>;
1101-
samsung,pll-clock-frequency = <24000000>;
11021089
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
11031090
power-domains = <&disp_blk_ctrl IMX8MN_DISPBLK_PD_MIPI_DSI>;
11041091
status = "disabled";
@@ -1142,6 +1129,21 @@
11421129
"lcdif-axi", "lcdif-apb", "lcdif-pix",
11431130
"dsi-pclk", "dsi-ref",
11441131
"csi-aclk", "csi-pclk";
1132+
assigned-clocks = <&clk IMX8MN_CLK_DSI_CORE>,
1133+
<&clk IMX8MN_CLK_DSI_PHY_REF>,
1134+
<&clk IMX8MN_CLK_DISP_PIXEL>,
1135+
<&clk IMX8MN_CLK_DISP_AXI>,
1136+
<&clk IMX8MN_CLK_DISP_APB>;
1137+
assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_266M>,
1138+
<&clk IMX8MN_CLK_24M>,
1139+
<&clk IMX8MN_VIDEO_PLL1_OUT>,
1140+
<&clk IMX8MN_SYS_PLL2_1000M>,
1141+
<&clk IMX8MN_SYS_PLL1_800M>;
1142+
assigned-clock-rates = <266000000>,
1143+
<24000000>,
1144+
<594000000>,
1145+
<500000000>,
1146+
<200000000>;
11451147
#power-domain-cells = <1>;
11461148
};
11471149

‎arch/arm64/boot/dts/freescale/imx8mp.dtsi‎

Lines changed: 9 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -1211,13 +1211,6 @@
12111211
<&clk IMX8MP_CLK_MEDIA_APB_ROOT>,
12121212
<&clk IMX8MP_CLK_MEDIA_AXI_ROOT>;
12131213
clock-names = "pix", "axi", "disp_axi";
1214-
assigned-clocks = <&clk IMX8MP_CLK_MEDIA_DISP1_PIX_ROOT>,
1215-
<&clk IMX8MP_CLK_MEDIA_AXI>,
1216-
<&clk IMX8MP_CLK_MEDIA_APB>;
1217-
assigned-clock-parents = <&clk IMX8MP_CLK_MEDIA_DISP1_PIX>,
1218-
<&clk IMX8MP_SYS_PLL2_1000M>,
1219-
<&clk IMX8MP_SYS_PLL1_800M>;
1220-
assigned-clock-rates = <594000000>, <500000000>, <200000000>;
12211214
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
12221215
power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_LCDIF_1>;
12231216
status = "disabled";
@@ -1237,11 +1230,6 @@
12371230
<&clk IMX8MP_CLK_MEDIA_APB_ROOT>,
12381231
<&clk IMX8MP_CLK_MEDIA_AXI_ROOT>;
12391232
clock-names = "pix", "axi", "disp_axi";
1240-
assigned-clocks = <&clk IMX8MP_CLK_MEDIA_DISP2_PIX>,
1241-
<&clk IMX8MP_VIDEO_PLL1>;
1242-
assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>,
1243-
<&clk IMX8MP_VIDEO_PLL1_REF_SEL>;
1244-
assigned-clock-rates = <0>, <1039500000>;
12451233
power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_LCDIF_2>;
12461234
status = "disabled";
12471235

@@ -1296,11 +1284,16 @@
12961284
"disp1", "disp2", "isp", "phy";
12971285

12981286
assigned-clocks = <&clk IMX8MP_CLK_MEDIA_AXI>,
1299-
<&clk IMX8MP_CLK_MEDIA_APB>;
1287+
<&clk IMX8MP_CLK_MEDIA_APB>,
1288+
<&clk IMX8MP_CLK_MEDIA_DISP1_PIX>,
1289+
<&clk IMX8MP_CLK_MEDIA_DISP2_PIX>,
1290+
<&clk IMX8MP_VIDEO_PLL1>;
13001291
assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
1301-
<&clk IMX8MP_SYS_PLL1_800M>;
1302-
assigned-clock-rates = <500000000>, <200000000>;
1303-
1292+
<&clk IMX8MP_SYS_PLL1_800M>,
1293+
<&clk IMX8MP_VIDEO_PLL1_OUT>,
1294+
<&clk IMX8MP_VIDEO_PLL1_OUT>;
1295+
assigned-clock-rates = <500000000>, <200000000>,
1296+
<0>, <0>, <1039500000>;
13041297
#power-domain-cells = <1>;
13051298

13061299
lvds_bridge: bridge@5c {

‎arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,12 @@
3333
};
3434
};
3535

36+
&iomuxc {
37+
pinctrl-names = "default";
38+
pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>,
39+
<&pinctrl_lpspi2_cs2>;
40+
};
41+
3642
/* Colibri SPI */
3743
&lpspi2 {
3844
status = "okay";

‎arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -48,8 +48,7 @@
4848
<IMX8QXP_SAI0_TXFS_LSIO_GPIO0_IO28 0x20>, /* SODIMM 101 */
4949
<IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27 0x20>, /* SODIMM 97 */
5050
<IMX8QXP_ENET0_RGMII_RXC_LSIO_GPIO5_IO03 0x06000020>, /* SODIMM 85 */
51-
<IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26 0x20>, /* SODIMM 79 */
52-
<IMX8QXP_QSPI0A_DATA1_LSIO_GPIO3_IO10 0x06700041>; /* SODIMM 45 */
51+
<IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26 0x20>; /* SODIMM 79 */
5352
};
5453

5554
pinctrl_uart1_forceoff: uart1forceoffgrp {

‎arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi‎

Lines changed: 8 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -363,10 +363,6 @@
363363
/* TODO VPU Encoder/Decoder */
364364

365365
&iomuxc {
366-
pinctrl-names = "default";
367-
pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>,
368-
<&pinctrl_hog2>, <&pinctrl_lpspi2_cs2>;
369-
370366
/* On-module touch pen-down interrupt */
371367
pinctrl_ad7879_int: ad7879intgrp {
372368
fsl,pins = <IMX8QXP_MIPI_CSI0_I2C0_SCL_LSIO_GPIO3_IO05 0x21>;
@@ -499,8 +495,7 @@
499495
};
500496

501497
pinctrl_hog1: hog1grp {
502-
fsl,pins = <IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01 0x20>, /* SODIMM 75 */
503-
<IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16 0x20>; /* SODIMM 93 */
498+
fsl,pins = <IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16 0x20>; /* SODIMM 93 */
504499
};
505500

506501
pinctrl_hog2: hog2grp {
@@ -774,3 +769,10 @@
774769
fsl,pins = <IMX8QXP_SCU_BOOT_MODE3_SCU_DSC_RTC_CLOCK_OUTPUT_32K 0x20>;
775770
};
776771
};
772+
773+
/* Delete peripherals which are not present on SOC, but are defined in imx8-ss-*.dtsi */
774+
775+
/delete-node/ &adc1;
776+
/delete-node/ &adc1_lpcg;
777+
/delete-node/ &dsp;
778+
/delete-node/ &dsp_lpcg;

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