Skip to content

Commit 688fded

Browse files
prabhakarladgeertu
authored andcommitted
arm64: dts: renesas: r9a09g057: Add CANFD node
Add CANFD node to RZ/V2H(P) ("R9A09G057") SoC DTSI. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251224175204.3400062-7-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
1 parent edd0ce2 commit 688fded

1 file changed

Lines changed: 60 additions & 0 deletions

File tree

arch/arm64/boot/dts/renesas/r9a09g057.dtsi

Lines changed: 60 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -690,6 +690,66 @@
690690
status = "disabled";
691691
};
692692

693+
canfd: can@12440000 {
694+
compatible = "renesas,r9a09g057-canfd", "renesas,r9a09g047-canfd";
695+
reg = <0 0x12440000 0 0x40000>;
696+
interrupts = <GIC_SPI 709 IRQ_TYPE_LEVEL_HIGH>,
697+
<GIC_SPI 710 IRQ_TYPE_LEVEL_HIGH>,
698+
<GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>,
699+
<GIC_SPI 703 IRQ_TYPE_LEVEL_HIGH>,
700+
<GIC_SPI 711 IRQ_TYPE_LEVEL_HIGH>,
701+
<GIC_SPI 698 IRQ_TYPE_LEVEL_HIGH>,
702+
<GIC_SPI 704 IRQ_TYPE_LEVEL_HIGH>,
703+
<GIC_SPI 712 IRQ_TYPE_LEVEL_HIGH>,
704+
<GIC_SPI 699 IRQ_TYPE_LEVEL_HIGH>,
705+
<GIC_SPI 705 IRQ_TYPE_LEVEL_HIGH>,
706+
<GIC_SPI 713 IRQ_TYPE_LEVEL_HIGH>,
707+
<GIC_SPI 700 IRQ_TYPE_LEVEL_HIGH>,
708+
<GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH>,
709+
<GIC_SPI 714 IRQ_TYPE_LEVEL_HIGH>,
710+
<GIC_SPI 701 IRQ_TYPE_LEVEL_HIGH>,
711+
<GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>,
712+
<GIC_SPI 715 IRQ_TYPE_LEVEL_HIGH>,
713+
<GIC_SPI 702 IRQ_TYPE_LEVEL_HIGH>,
714+
<GIC_SPI 708 IRQ_TYPE_LEVEL_HIGH>,
715+
<GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH>;
716+
interrupt-names = "g_err", "g_recc",
717+
"ch0_err", "ch0_rec", "ch0_trx",
718+
"ch1_err", "ch1_rec", "ch1_trx",
719+
"ch2_err", "ch2_rec", "ch2_trx",
720+
"ch3_err", "ch3_rec", "ch3_trx",
721+
"ch4_err", "ch4_rec", "ch4_trx",
722+
"ch5_err", "ch5_rec", "ch5_trx";
723+
clocks = <&cpg CPG_MOD 0x9c>, <&cpg CPG_MOD 0x9d>,
724+
<&cpg CPG_MOD 0x9e>;
725+
clock-names = "fck", "ram_clk", "can_clk";
726+
assigned-clocks = <&cpg CPG_MOD 0x9e>;
727+
assigned-clock-rates = <80000000>;
728+
resets = <&cpg 0xa1>, <&cpg 0xa2>;
729+
reset-names = "rstp_n", "rstc_n";
730+
power-domains = <&cpg>;
731+
status = "disabled";
732+
733+
channel0 {
734+
status = "disabled";
735+
};
736+
channel1 {
737+
status = "disabled";
738+
};
739+
channel2 {
740+
status = "disabled";
741+
};
742+
channel3 {
743+
status = "disabled";
744+
};
745+
channel4 {
746+
status = "disabled";
747+
};
748+
channel5 {
749+
status = "disabled";
750+
};
751+
};
752+
693753
rspi0: spi@12800000 {
694754
compatible = "renesas,r9a09g057-rspi";
695755
reg = <0x0 0x12800000 0x0 0x400>;

0 commit comments

Comments
 (0)