@@ -562,7 +562,7 @@ static void qcom_scm_set_download_mode(u32 dload_mode)
562562 * qcom_scm_pas_init_image() - Initialize peripheral authentication service
563563 * state machine for a given peripheral, using the
564564 * metadata
565- * @peripheral: peripheral id
565+ * @pas_id: peripheral authentication service id
566566 * @metadata: pointer to memory containing ELF header, program header table
567567 * and optional blob of data used for authenticating the metadata
568568 * and the rest of the firmware
@@ -575,7 +575,7 @@ static void qcom_scm_set_download_mode(u32 dload_mode)
575575 * track the metadata allocation, this needs to be released by invoking
576576 * qcom_scm_pas_metadata_release() by the caller.
577577 */
578- int qcom_scm_pas_init_image (u32 peripheral , const void * metadata , size_t size ,
578+ int qcom_scm_pas_init_image (u32 pas_id , const void * metadata , size_t size ,
579579 struct qcom_scm_pas_metadata * ctx )
580580{
581581 dma_addr_t mdata_phys ;
@@ -585,7 +585,7 @@ int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size,
585585 .svc = QCOM_SCM_SVC_PIL ,
586586 .cmd = QCOM_SCM_PIL_PAS_INIT_IMAGE ,
587587 .arginfo = QCOM_SCM_ARGS (2 , QCOM_SCM_VAL , QCOM_SCM_RW ),
588- .args [0 ] = peripheral ,
588+ .args [0 ] = pas_id ,
589589 .owner = ARM_SMCCC_OWNER_SIP ,
590590 };
591591 struct qcom_scm_res res ;
@@ -656,20 +656,20 @@ EXPORT_SYMBOL_GPL(qcom_scm_pas_metadata_release);
656656/**
657657 * qcom_scm_pas_mem_setup() - Prepare the memory related to a given peripheral
658658 * for firmware loading
659- * @peripheral : peripheral id
659+ * @pas_id : peripheral authentication service id
660660 * @addr: start address of memory area to prepare
661661 * @size: size of the memory area to prepare
662662 *
663663 * Returns 0 on success.
664664 */
665- int qcom_scm_pas_mem_setup (u32 peripheral , phys_addr_t addr , phys_addr_t size )
665+ int qcom_scm_pas_mem_setup (u32 pas_id , phys_addr_t addr , phys_addr_t size )
666666{
667667 int ret ;
668668 struct qcom_scm_desc desc = {
669669 .svc = QCOM_SCM_SVC_PIL ,
670670 .cmd = QCOM_SCM_PIL_PAS_MEM_SETUP ,
671671 .arginfo = QCOM_SCM_ARGS (3 ),
672- .args [0 ] = peripheral ,
672+ .args [0 ] = pas_id ,
673673 .args [1 ] = addr ,
674674 .args [2 ] = size ,
675675 .owner = ARM_SMCCC_OWNER_SIP ,
@@ -697,18 +697,18 @@ EXPORT_SYMBOL_GPL(qcom_scm_pas_mem_setup);
697697/**
698698 * qcom_scm_pas_auth_and_reset() - Authenticate the given peripheral firmware
699699 * and reset the remote processor
700- * @peripheral : peripheral id
700+ * @pas_id : peripheral authentication service id
701701 *
702702 * Return 0 on success.
703703 */
704- int qcom_scm_pas_auth_and_reset (u32 peripheral )
704+ int qcom_scm_pas_auth_and_reset (u32 pas_id )
705705{
706706 int ret ;
707707 struct qcom_scm_desc desc = {
708708 .svc = QCOM_SCM_SVC_PIL ,
709709 .cmd = QCOM_SCM_PIL_PAS_AUTH_AND_RESET ,
710710 .arginfo = QCOM_SCM_ARGS (1 ),
711- .args [0 ] = peripheral ,
711+ .args [0 ] = pas_id ,
712712 .owner = ARM_SMCCC_OWNER_SIP ,
713713 };
714714 struct qcom_scm_res res ;
@@ -733,18 +733,18 @@ EXPORT_SYMBOL_GPL(qcom_scm_pas_auth_and_reset);
733733
734734/**
735735 * qcom_scm_pas_shutdown() - Shut down the remote processor
736- * @peripheral: peripheral id
736+ * @pas_id: peripheral authentication service id
737737 *
738738 * Returns 0 on success.
739739 */
740- int qcom_scm_pas_shutdown (u32 peripheral )
740+ int qcom_scm_pas_shutdown (u32 pas_id )
741741{
742742 int ret ;
743743 struct qcom_scm_desc desc = {
744744 .svc = QCOM_SCM_SVC_PIL ,
745745 .cmd = QCOM_SCM_PIL_PAS_SHUTDOWN ,
746746 .arginfo = QCOM_SCM_ARGS (1 ),
747- .args [0 ] = peripheral ,
747+ .args [0 ] = pas_id ,
748748 .owner = ARM_SMCCC_OWNER_SIP ,
749749 };
750750 struct qcom_scm_res res ;
@@ -770,18 +770,18 @@ EXPORT_SYMBOL_GPL(qcom_scm_pas_shutdown);
770770/**
771771 * qcom_scm_pas_supported() - Check if the peripheral authentication service is
772772 * available for the given peripherial
773- * @peripheral : peripheral id
773+ * @pas_id : peripheral authentication service id
774774 *
775775 * Returns true if PAS is supported for this peripheral, otherwise false.
776776 */
777- bool qcom_scm_pas_supported (u32 peripheral )
777+ bool qcom_scm_pas_supported (u32 pas_id )
778778{
779779 int ret ;
780780 struct qcom_scm_desc desc = {
781781 .svc = QCOM_SCM_SVC_PIL ,
782782 .cmd = QCOM_SCM_PIL_PAS_IS_SUPPORTED ,
783783 .arginfo = QCOM_SCM_ARGS (1 ),
784- .args [0 ] = peripheral ,
784+ .args [0 ] = pas_id ,
785785 .owner = ARM_SMCCC_OWNER_SIP ,
786786 };
787787 struct qcom_scm_res res ;
0 commit comments