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arm64: zynqmp: Move fixed clock to / for kv260
fixed clock nodes can't be on the bus because they are missing reg property. That's why move them to root. And because it is root it is good to have it as the first node in a file. Signed-off-by: Michal Simek <michal.simek@amd.com>
1 parent fc622c9 commit 6a10a19

2 files changed

Lines changed: 29 additions & 29 deletions

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arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -21,20 +21,7 @@
2121
/dts-v1/;
2222
/plugin/;
2323

24-
&i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
25-
#address-cells = <1>;
26-
#size-cells = <0>;
27-
pinctrl-names = "default", "gpio";
28-
pinctrl-0 = <&pinctrl_i2c1_default>;
29-
pinctrl-1 = <&pinctrl_i2c1_gpio>;
30-
scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
31-
sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
32-
33-
/* u14 - 0x40 - ina260 */
34-
/* u27 - 0xe0 - STDP4320 DP/HDMI splitter */
35-
};
36-
37-
&amba {
24+
&{/} {
3825
si5332_0: si5332_0 { /* u17 */
3926
compatible = "fixed-clock";
4027
#clock-cells = <0>;
@@ -72,6 +59,19 @@
7259
};
7360
};
7461

62+
&i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
63+
#address-cells = <1>;
64+
#size-cells = <0>;
65+
pinctrl-names = "default", "gpio";
66+
pinctrl-0 = <&pinctrl_i2c1_default>;
67+
pinctrl-1 = <&pinctrl_i2c1_gpio>;
68+
scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
69+
sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
70+
71+
/* u14 - 0x40 - ina260 */
72+
/* u27 - 0xe0 - STDP4320 DP/HDMI splitter */
73+
};
74+
7575
/* DP/USB 3.0 and SATA */
7676
&psgtr {
7777
status = "okay";

arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -16,21 +16,7 @@
1616
/dts-v1/;
1717
/plugin/;
1818

19-
&i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
20-
#address-cells = <1>;
21-
#size-cells = <0>;
22-
pinctrl-names = "default", "gpio";
23-
pinctrl-0 = <&pinctrl_i2c1_default>;
24-
pinctrl-1 = <&pinctrl_i2c1_gpio>;
25-
scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
26-
sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
27-
28-
/* u14 - 0x40 - ina260 */
29-
/* u43 - 0x2d - usb5744 */
30-
/* u27 - 0xe0 - STDP4320 DP/HDMI splitter */
31-
};
32-
33-
&amba {
19+
&{/} {
3420
si5332_0: si5332_0 { /* u17 */
3521
compatible = "fixed-clock";
3622
#clock-cells = <0>;
@@ -68,6 +54,20 @@
6854
};
6955
};
7056

57+
&i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
58+
#address-cells = <1>;
59+
#size-cells = <0>;
60+
pinctrl-names = "default", "gpio";
61+
pinctrl-0 = <&pinctrl_i2c1_default>;
62+
pinctrl-1 = <&pinctrl_i2c1_gpio>;
63+
scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
64+
sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
65+
66+
/* u14 - 0x40 - ina260 */
67+
/* u43 - 0x2d - usb5744 */
68+
/* u27 - 0xe0 - STDP4320 DP/HDMI splitter */
69+
};
70+
7171
/* DP/USB 3.0 */
7272
&psgtr {
7373
status = "okay";

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