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Merge tag 'sunxi-clk-for-5.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-allwinner
Pull Allwinner clk driver updates from Maxime Ripard: "Our usual PR for the Allwinner SoCs, this time adding support for the Allwinner H616 SoC, and a few H6 fixes." * tag 'sunxi-clk-for-5.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: clk: sunxi-ng: Add support for the Allwinner H616 CCU clk: sunxi-ng: Add support for the Allwinner H616 R-CCU dt-bindings: clk: sunxi-ccu: Add compatible string for Allwinner H616 clk: sunxi-ng: h6: Fix clock divider range on some clocks clk: sunxi: clk-mod0: Demote non-conformant kernel-doc header clk: sunxi: clk-a10-ve: Demote obvious kernel-doc abuse clk: sunxi: clk-sunxi: Demote a bunch of non-conformant kernel-doc headers clk: sunxi-ng: h6: Fix CEC clock clk: sunxi-ng: h6-r: Add R_APB2_RSB clock and reset
2 parents 5c8fe58 + 88dde5e commit 6bbea83

15 files changed

Lines changed: 1482 additions & 25 deletions

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‎Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,8 @@ properties:
4141
- allwinner,sun50i-h5-ccu
4242
- allwinner,sun50i-h6-ccu
4343
- allwinner,sun50i-h6-r-ccu
44+
- allwinner,sun50i-h616-ccu
45+
- allwinner,sun50i-h616-r-ccu
4446
- allwinner,suniv-f1c100s-ccu
4547
- nextthing,gr8-ccu
4648

@@ -82,6 +84,7 @@ if:
8284
- allwinner,sun50i-a64-r-ccu
8385
- allwinner,sun50i-a100-r-ccu
8486
- allwinner,sun50i-h6-r-ccu
87+
- allwinner,sun50i-h616-r-ccu
8588

8689
then:
8790
properties:
@@ -100,6 +103,7 @@ else:
100103
enum:
101104
- allwinner,sun50i-a100-ccu
102105
- allwinner,sun50i-h6-ccu
106+
- allwinner,sun50i-h616-ccu
103107

104108
then:
105109
properties:

‎drivers/clk/sunxi-ng/Kconfig‎

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -32,8 +32,13 @@ config SUN50I_H6_CCU
3232
default ARM64 && ARCH_SUNXI
3333
depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
3434

35+
config SUN50I_H616_CCU
36+
bool "Support for the Allwinner H616 CCU"
37+
default ARM64 && ARCH_SUNXI
38+
depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
39+
3540
config SUN50I_H6_R_CCU
36-
bool "Support for the Allwinner H6 PRCM CCU"
41+
bool "Support for the Allwinner H6 and H616 PRCM CCU"
3742
default ARM64 && ARCH_SUNXI
3843
depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
3944

‎drivers/clk/sunxi-ng/Makefile‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,7 @@ obj-$(CONFIG_SUN50I_A64_CCU) += ccu-sun50i-a64.o
2626
obj-$(CONFIG_SUN50I_A100_CCU) += ccu-sun50i-a100.o
2727
obj-$(CONFIG_SUN50I_A100_R_CCU) += ccu-sun50i-a100-r.o
2828
obj-$(CONFIG_SUN50I_H6_CCU) += ccu-sun50i-h6.o
29+
obj-$(CONFIG_SUN50I_H616_CCU) += ccu-sun50i-h616.o
2930
obj-$(CONFIG_SUN50I_H6_R_CCU) += ccu-sun50i-h6-r.o
3031
obj-$(CONFIG_SUN4I_A10_CCU) += ccu-sun4i-a10.o
3132
obj-$(CONFIG_SUN5I_CCU) += ccu-sun5i.o

‎drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c‎

Lines changed: 53 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -91,6 +91,8 @@ static SUNXI_CCU_GATE(r_apb2_uart_clk, "r-apb2-uart", "r-apb2",
9191
0x18c, BIT(0), 0);
9292
static SUNXI_CCU_GATE(r_apb2_i2c_clk, "r-apb2-i2c", "r-apb2",
9393
0x19c, BIT(0), 0);
94+
static SUNXI_CCU_GATE(r_apb2_rsb_clk, "r-apb2-rsb", "r-apb2",
95+
0x1bc, BIT(0), 0);
9496
static SUNXI_CCU_GATE(r_apb1_ir_clk, "r-apb1-ir", "r-apb1",
9597
0x1cc, BIT(0), 0);
9698
static SUNXI_CCU_GATE(r_apb1_w1_clk, "r-apb1-w1", "r-apb1",
@@ -130,12 +132,23 @@ static struct ccu_common *sun50i_h6_r_ccu_clks[] = {
130132
&r_apb1_pwm_clk.common,
131133
&r_apb2_uart_clk.common,
132134
&r_apb2_i2c_clk.common,
135+
&r_apb2_rsb_clk.common,
133136
&r_apb1_ir_clk.common,
134137
&r_apb1_w1_clk.common,
135138
&ir_clk.common,
136139
&w1_clk.common,
137140
};
138141

142+
static struct ccu_common *sun50i_h616_r_ccu_clks[] = {
143+
&r_apb1_clk.common,
144+
&r_apb2_clk.common,
145+
&r_apb1_twd_clk.common,
146+
&r_apb2_i2c_clk.common,
147+
&r_apb2_rsb_clk.common,
148+
&r_apb1_ir_clk.common,
149+
&ir_clk.common,
150+
};
151+
139152
static struct clk_hw_onecell_data sun50i_h6_r_hw_clks = {
140153
.hws = {
141154
[CLK_AR100] = &ar100_clk.common.hw,
@@ -147,6 +160,7 @@ static struct clk_hw_onecell_data sun50i_h6_r_hw_clks = {
147160
[CLK_R_APB1_PWM] = &r_apb1_pwm_clk.common.hw,
148161
[CLK_R_APB2_UART] = &r_apb2_uart_clk.common.hw,
149162
[CLK_R_APB2_I2C] = &r_apb2_i2c_clk.common.hw,
163+
[CLK_R_APB2_RSB] = &r_apb2_rsb_clk.common.hw,
150164
[CLK_R_APB1_IR] = &r_apb1_ir_clk.common.hw,
151165
[CLK_R_APB1_W1] = &r_apb1_w1_clk.common.hw,
152166
[CLK_IR] = &ir_clk.common.hw,
@@ -155,16 +169,38 @@ static struct clk_hw_onecell_data sun50i_h6_r_hw_clks = {
155169
.num = CLK_NUMBER,
156170
};
157171

172+
static struct clk_hw_onecell_data sun50i_h616_r_hw_clks = {
173+
.hws = {
174+
[CLK_R_AHB] = &r_ahb_clk.hw,
175+
[CLK_R_APB1] = &r_apb1_clk.common.hw,
176+
[CLK_R_APB2] = &r_apb2_clk.common.hw,
177+
[CLK_R_APB1_TWD] = &r_apb1_twd_clk.common.hw,
178+
[CLK_R_APB2_I2C] = &r_apb2_i2c_clk.common.hw,
179+
[CLK_R_APB2_RSB] = &r_apb2_rsb_clk.common.hw,
180+
[CLK_R_APB1_IR] = &r_apb1_ir_clk.common.hw,
181+
[CLK_IR] = &ir_clk.common.hw,
182+
},
183+
.num = CLK_NUMBER,
184+
};
185+
158186
static struct ccu_reset_map sun50i_h6_r_ccu_resets[] = {
159187
[RST_R_APB1_TIMER] = { 0x11c, BIT(16) },
160188
[RST_R_APB1_TWD] = { 0x12c, BIT(16) },
161189
[RST_R_APB1_PWM] = { 0x13c, BIT(16) },
162190
[RST_R_APB2_UART] = { 0x18c, BIT(16) },
163191
[RST_R_APB2_I2C] = { 0x19c, BIT(16) },
192+
[RST_R_APB2_RSB] = { 0x1bc, BIT(16) },
164193
[RST_R_APB1_IR] = { 0x1cc, BIT(16) },
165194
[RST_R_APB1_W1] = { 0x1ec, BIT(16) },
166195
};
167196

197+
static struct ccu_reset_map sun50i_h616_r_ccu_resets[] = {
198+
[RST_R_APB1_TWD] = { 0x12c, BIT(16) },
199+
[RST_R_APB2_I2C] = { 0x19c, BIT(16) },
200+
[RST_R_APB2_RSB] = { 0x1bc, BIT(16) },
201+
[RST_R_APB1_IR] = { 0x1cc, BIT(16) },
202+
};
203+
168204
static const struct sunxi_ccu_desc sun50i_h6_r_ccu_desc = {
169205
.ccu_clks = sun50i_h6_r_ccu_clks,
170206
.num_ccu_clks = ARRAY_SIZE(sun50i_h6_r_ccu_clks),
@@ -175,6 +211,16 @@ static const struct sunxi_ccu_desc sun50i_h6_r_ccu_desc = {
175211
.num_resets = ARRAY_SIZE(sun50i_h6_r_ccu_resets),
176212
};
177213

214+
static const struct sunxi_ccu_desc sun50i_h616_r_ccu_desc = {
215+
.ccu_clks = sun50i_h616_r_ccu_clks,
216+
.num_ccu_clks = ARRAY_SIZE(sun50i_h616_r_ccu_clks),
217+
218+
.hw_clks = &sun50i_h616_r_hw_clks,
219+
220+
.resets = sun50i_h616_r_ccu_resets,
221+
.num_resets = ARRAY_SIZE(sun50i_h616_r_ccu_resets),
222+
};
223+
178224
static void __init sunxi_r_ccu_init(struct device_node *node,
179225
const struct sunxi_ccu_desc *desc)
180226
{
@@ -195,3 +241,10 @@ static void __init sun50i_h6_r_ccu_setup(struct device_node *node)
195241
}
196242
CLK_OF_DECLARE(sun50i_h6_r_ccu, "allwinner,sun50i-h6-r-ccu",
197243
sun50i_h6_r_ccu_setup);
244+
245+
static void __init sun50i_h616_r_ccu_setup(struct device_node *node)
246+
{
247+
sunxi_r_ccu_init(node, &sun50i_h616_r_ccu_desc);
248+
}
249+
CLK_OF_DECLARE(sun50i_h616_r_ccu, "allwinner,sun50i-h616-r-ccu",
250+
sun50i_h616_r_ccu_setup);

‎drivers/clk/sunxi-ng/ccu-sun50i-h6-r.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,6 @@
1414

1515
#define CLK_R_APB2 3
1616

17-
#define CLK_NUMBER (CLK_W1 + 1)
17+
#define CLK_NUMBER (CLK_R_APB2_RSB + 1)
1818

1919
#endif /* _CCU_SUN50I_H6_R_H */

‎drivers/clk/sunxi-ng/ccu-sun50i-h6.c‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -237,7 +237,7 @@ static const char * const psi_ahb1_ahb2_parents[] = { "osc24M", "osc32k",
237237
static SUNXI_CCU_MP_WITH_MUX(psi_ahb1_ahb2_clk, "psi-ahb1-ahb2",
238238
psi_ahb1_ahb2_parents,
239239
0x510,
240-
0, 5, /* M */
240+
0, 2, /* M */
241241
8, 2, /* P */
242242
24, 2, /* mux */
243243
0);
@@ -246,19 +246,19 @@ static const char * const ahb3_apb1_apb2_parents[] = { "osc24M", "osc32k",
246246
"psi-ahb1-ahb2",
247247
"pll-periph0" };
248248
static SUNXI_CCU_MP_WITH_MUX(ahb3_clk, "ahb3", ahb3_apb1_apb2_parents, 0x51c,
249-
0, 5, /* M */
249+
0, 2, /* M */
250250
8, 2, /* P */
251251
24, 2, /* mux */
252252
0);
253253

254254
static SUNXI_CCU_MP_WITH_MUX(apb1_clk, "apb1", ahb3_apb1_apb2_parents, 0x520,
255-
0, 5, /* M */
255+
0, 2, /* M */
256256
8, 2, /* P */
257257
24, 2, /* mux */
258258
0);
259259

260260
static SUNXI_CCU_MP_WITH_MUX(apb2_clk, "apb2", ahb3_apb1_apb2_parents, 0x524,
261-
0, 5, /* M */
261+
0, 2, /* M */
262262
8, 2, /* P */
263263
24, 2, /* mux */
264264
0);
@@ -682,7 +682,7 @@ static struct ccu_mux hdmi_cec_clk = {
682682

683683
.common = {
684684
.reg = 0xb10,
685-
.features = CCU_FEATURE_VARIABLE_PREDIV,
685+
.features = CCU_FEATURE_FIXED_PREDIV,
686686
.hw.init = CLK_HW_INIT_PARENTS("hdmi-cec",
687687
hdmi_cec_parents,
688688
&ccu_mux_ops,

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