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Merge tag 'samsung-dt64-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.4 1. Exynos850: add headers with AUD, G3D and HSI clock controller clock IDs. Add G3D (GPU) clock controller node. 2. Exynos5433: fixes for dtbs_check: move MIPI phy to PMU node. 3. Drop old MSHC aliases (while adding proper mmc-ddr-1_8v which was selected by the driver based on the MSHC alias) and add generic MMC aliases in each board. The aliases match known numbering in the schematics. * tag 'samsung-dt64-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: exynos: add mmc aliases arm64: dts: exynos: drop mshc aliases arm64: dts: exynos: Add CMU_G3D node for Exynos850 SoC arm64: dts: exynos: move MIPI phy to PMU node in Exynos5433 dt-bindings: clock: exynos850: Add AUD and HSI main gate clocks dt-bindings: clock: exynos850: Add Exynos850 CMU_G3D Link: https://lore.kernel.org/r/20230405080438.156805-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 parents 837be1c + 5f67124 commit 6dcb6ff

7 files changed

Lines changed: 69 additions & 17 deletions

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‎Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml‎

Lines changed: 19 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -37,6 +37,7 @@ properties:
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- samsung,exynos850-cmu-cmgp
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- samsung,exynos850-cmu-core
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- samsung,exynos850-cmu-dpu
40+
- samsung,exynos850-cmu-g3d
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- samsung,exynos850-cmu-hsi
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- samsung,exynos850-cmu-is
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- samsung,exynos850-cmu-mfcmscl
@@ -169,6 +170,24 @@ allOf:
169170
- const: oscclk
170171
- const: dout_dpu
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173+
- if:
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properties:
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compatible:
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contains:
177+
const: samsung,exynos850-cmu-g3d
178+
179+
then:
180+
properties:
181+
clocks:
182+
items:
183+
- description: External reference clock (26 MHz)
184+
- description: G3D clock (from CMU_TOP)
185+
186+
clock-names:
187+
items:
188+
- const: oscclk
189+
- const: dout_g3d_switch
190+
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- if:
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properties:
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compatible:

‎arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -21,6 +21,8 @@
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gsc0 = &gsc_0;
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gsc1 = &gsc_1;
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gsc2 = &gsc_2;
24+
mmc0 = &mshc_0;
25+
mmc2 = &mshc_2;
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pinctrl0 = &pinctrl_alive;
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pinctrl1 = &pinctrl_aud;
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pinctrl2 = &pinctrl_cpif;
@@ -40,8 +42,6 @@
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spi2 = &spi_2;
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spi3 = &spi_3;
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spi4 = &spi_4;
43-
mshc0 = &mshc_0;
44-
mshc2 = &mshc_2;
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};
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chosen {
@@ -952,6 +952,7 @@
952952

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&mshc_0 {
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status = "okay";
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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cap-mmc-highspeed;

‎arch/arm64/boot/dts/exynos/exynos5433.dtsi‎

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Original file line numberDiff line numberDiff line change
@@ -911,12 +911,20 @@
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};
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pmu_system_controller: system-controller@105c0000 {
914-
compatible = "samsung,exynos5433-pmu", "syscon";
914+
compatible = "samsung,exynos5433-pmu", "simple-mfd", "syscon";
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reg = <0x105c0000 0x5008>;
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#clock-cells = <1>;
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clock-names = "clkout16";
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clocks = <&xxti>;
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920+
mipi_phy: mipi-phy {
921+
compatible = "samsung,exynos5433-mipi-video-phy";
922+
#phy-cells = <1>;
923+
samsung,cam0-sysreg = <&syscon_cam0>;
924+
samsung,cam1-sysreg = <&syscon_cam1>;
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samsung,disp-sysreg = <&syscon_disp>;
926+
};
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reboot: syscon-reboot {
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compatible = "syscon-reboot";
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regmap = <&pmu_system_controller>;
@@ -936,15 +944,6 @@
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interrupts = <GIC_PPI 9 0xf04>;
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};
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939-
mipi_phy: video-phy {
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compatible = "samsung,exynos5433-mipi-video-phy";
941-
#phy-cells = <1>;
942-
samsung,pmu-syscon = <&pmu_system_controller>;
943-
samsung,cam0-sysreg = <&syscon_cam0>;
944-
samsung,cam1-sysreg = <&syscon_cam1>;
945-
samsung,disp-sysreg = <&syscon_disp>;
946-
};
947-
948947
decon: decon@13800000 {
949948
compatible = "samsung,exynos5433-decon";
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reg = <0x13800000 0x2104>;

‎arch/arm64/boot/dts/exynos/exynos7-espresso.dts‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -17,9 +17,9 @@
1717
compatible = "samsung,exynos7-espresso", "samsung,exynos7";
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1919
aliases {
20+
mmc0 = &mmc_0;
21+
mmc2 = &mmc_2;
2022
serial0 = &serial_2;
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mshc0 = &mmc_0;
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mshc2 = &mmc_2;
2323
};
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2525
chosen {
@@ -362,6 +362,7 @@
362362
&mmc_0 {
363363
status = "okay";
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cap-mmc-highspeed;
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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non-removable;
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card-detect-delay = <200>;

‎arch/arm64/boot/dts/exynos/exynos7885-jackpotlte.dts‎

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@@ -18,6 +18,7 @@
1818
chassis-type = "handset";
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2020
aliases {
21+
mmc0 = &mmc_0;
2122
serial0 = &serial_0;
2223
serial1 = &serial_1;
2324
serial2 = &serial_2;

‎arch/arm64/boot/dts/exynos/exynos850.dtsi‎

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@@ -245,6 +245,15 @@
245245
"dout_peri_uart", "dout_peri_ip";
246246
};
247247

248+
cmu_g3d: clock-controller@11400000 {
249+
compatible = "samsung,exynos850-cmu-g3d";
250+
reg = <0x11400000 0x8000>;
251+
#clock-cells = <1>;
252+
253+
clocks = <&oscclk>, <&cmu_top CLK_DOUT_G3D_SWITCH>;
254+
clock-names = "oscclk", "dout_g3d_switch";
255+
};
256+
248257
cmu_apm: clock-controller@11800000 {
249258
compatible = "samsung,exynos850-cmu-apm";
250259
reg = <0x11800000 0x8000>;

‎include/dt-bindings/clock/exynos850.h‎

Lines changed: 25 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -85,7 +85,10 @@
8585
#define CLK_DOUT_MFCMSCL_M2M 73
8686
#define CLK_DOUT_MFCMSCL_MCSC 74
8787
#define CLK_DOUT_MFCMSCL_JPEG 75
88-
#define TOP_NR_CLK 76
88+
#define CLK_MOUT_G3D_SWITCH 76
89+
#define CLK_GOUT_G3D_SWITCH 77
90+
#define CLK_DOUT_G3D_SWITCH 78
91+
#define TOP_NR_CLK 79
8992

9093
/* CMU_APM */
9194
#define CLK_RCO_I3C_PMIC 1
@@ -175,7 +178,8 @@
175178
#define IOCLK_AUDIOCDCLK5 58
176179
#define IOCLK_AUDIOCDCLK6 59
177180
#define TICK_USB 60
178-
#define AUD_NR_CLK 61
181+
#define CLK_GOUT_AUD_CMU_AUD_PCLK 61
182+
#define AUD_NR_CLK 62
179183

180184
/* CMU_CMGP */
181185
#define CLK_RCO_CMGP 1
@@ -195,6 +199,21 @@
195199
#define CLK_GOUT_SYSREG_CMGP_PCLK 15
196200
#define CMGP_NR_CLK 16
197201

202+
/* CMU_G3D */
203+
#define CLK_FOUT_G3D_PLL 1
204+
#define CLK_MOUT_G3D_PLL 2
205+
#define CLK_MOUT_G3D_SWITCH_USER 3
206+
#define CLK_MOUT_G3D_BUSD 4
207+
#define CLK_DOUT_G3D_BUSP 5
208+
#define CLK_GOUT_G3D_CMU_G3D_PCLK 6
209+
#define CLK_GOUT_G3D_GPU_CLK 7
210+
#define CLK_GOUT_G3D_TZPC_PCLK 8
211+
#define CLK_GOUT_G3D_GRAY2BIN_CLK 9
212+
#define CLK_GOUT_G3D_BUSD_CLK 10
213+
#define CLK_GOUT_G3D_BUSP_CLK 11
214+
#define CLK_GOUT_G3D_SYSREG_PCLK 12
215+
#define G3D_NR_CLK 13
216+
198217
/* CMU_HSI */
199218
#define CLK_MOUT_HSI_BUS_USER 1
200219
#define CLK_MOUT_HSI_MMC_CARD_USER 2
@@ -209,7 +228,10 @@
209228
#define CLK_GOUT_MMC_CARD_ACLK 11
210229
#define CLK_GOUT_MMC_CARD_SDCLKIN 12
211230
#define CLK_GOUT_SYSREG_HSI_PCLK 13
212-
#define HSI_NR_CLK 14
231+
#define CLK_GOUT_HSI_PPMU_ACLK 14
232+
#define CLK_GOUT_HSI_PPMU_PCLK 15
233+
#define CLK_GOUT_HSI_CMU_HSI_PCLK 16
234+
#define HSI_NR_CLK 17
213235

214236
/* CMU_IS */
215237
#define CLK_MOUT_IS_BUS_USER 1

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