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| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | +%YAML 1.2 |
| 3 | +--- |
| 4 | +$id: http://devicetree.org/schemas/soc/renesas/renesas,rzn1-gpioirqmux.yaml# |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | + |
| 7 | +title: Renesas RZ/N1 SoCs GPIO Interrupt Multiplexer |
| 8 | + |
| 9 | +description: | |
| 10 | + The Renesas RZ/N1 GPIO Interrupt Multiplexer multiplexes GPIO interrupt |
| 11 | + lines to the interrupt controller available in the SoC. |
| 12 | +
|
| 13 | + It selects up to 8 of the 96 GPIO interrupt lines available and connect them |
| 14 | + to 8 output interrupt lines. |
| 15 | +
|
| 16 | +maintainers: |
| 17 | + - Herve Codina <herve.codina@bootlin.com> |
| 18 | + |
| 19 | +properties: |
| 20 | + compatible: |
| 21 | + items: |
| 22 | + - enum: |
| 23 | + - renesas,r9a06g032-gpioirqmux |
| 24 | + - const: renesas,rzn1-gpioirqmux |
| 25 | + |
| 26 | + reg: |
| 27 | + maxItems: 1 |
| 28 | + |
| 29 | + "#address-cells": |
| 30 | + const: 0 |
| 31 | + |
| 32 | + "#interrupt-cells": |
| 33 | + const: 1 |
| 34 | + |
| 35 | + interrupt-map-mask: |
| 36 | + items: |
| 37 | + - const: 0x7f |
| 38 | + |
| 39 | + interrupt-map: |
| 40 | + description: | |
| 41 | + Specifies the mapping from external GPIO interrupt lines to the output |
| 42 | + interrupts. The array has up to 8 items defining the mapping related to |
| 43 | + the output line 0 (GIC 103) up to the output line 7 (GIC 110). |
| 44 | +
|
| 45 | + The child interrupt number set in arrays items is computed using the |
| 46 | + following formula: |
| 47 | + gpio_bank * 32 + gpio_number |
| 48 | + with: |
| 49 | + - gpio_bank: The GPIO bank number |
| 50 | + - 0 for GPIO0A, |
| 51 | + - 1 for GPIO1A, |
| 52 | + - 2 for GPIO2A |
| 53 | + - gpio_number: Number of the gpio in the bank (0..31) |
| 54 | + minItems: 1 |
| 55 | + maxItems: 8 |
| 56 | + |
| 57 | +required: |
| 58 | + - compatible |
| 59 | + - reg |
| 60 | + - "#address-cells" |
| 61 | + - "#interrupt-cells" |
| 62 | + - interrupt-map-mask |
| 63 | + - interrupt-map |
| 64 | + |
| 65 | +additionalProperties: false |
| 66 | + |
| 67 | +examples: |
| 68 | + - | |
| 69 | + #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 70 | +
|
| 71 | + gic: interrupt-controller { |
| 72 | + interrupt-controller; |
| 73 | + #address-cells = <0>; |
| 74 | + #interrupt-cells = <3>; |
| 75 | + }; |
| 76 | +
|
| 77 | + interrupt-controller@51000480 { |
| 78 | + compatible = "renesas,r9a06g032-gpioirqmux", "renesas,rzn1-gpioirqmux"; |
| 79 | + reg = <0x51000480 0x20>; |
| 80 | + #address-cells = <0>; |
| 81 | + #interrupt-cells = <1>; |
| 82 | + interrupt-map-mask = <0x7f>; |
| 83 | + interrupt-map = |
| 84 | + <32 &gic GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, /* line 0, GPIO1A.0 */ |
| 85 | + <89 &gic GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, /* line 1, GPIO2A.25 */ |
| 86 | + <9 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; /* line 3, GPIO0A.9 */ |
| 87 | + }; |
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